[PATCH] D146287: [AMDGPU][GISel] Add inverse ballot intrinsic

[Jessica Del via Phabricator via llvm-commits]

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The inverse ballot intrinsic takes in a boolean mask for all lanes and
returns the boolean for the current lane. See SPIR-V's
`subgroupInverseBallot()`.
This allows decision making via branch and select instructions with a
manually manipulated mask.

Implemented in GlobalISel and SelectionDAG, since currently both
are supported.
The SelectionDAG required pseudo instructions to use
the custom inserter.

The boolean mask needs to be uniform for all
lanes. Therefore we expect SGPR input. In case the source is in a
VGPR, we insert one or more `v_readfirstlane` instructions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D146287

Files:
  llvm/include/llvm/IR/IntrinsicsAMDGPU.td
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.inverse.ballot.i32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.inverse.ballot.i64.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i32.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll

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