[PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for FLI instruction in experimental zfa extension

Jun Sha via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 16 22:53:25 PDT 2023


joshua-arch1 added a comment.

In D141560#4198257 <https://reviews.llvm.org/D141560#4198257>, @craig.topper wrote:

> In D141560#4198252 <https://reviews.llvm.org/D141560#4198252>, @joshua-arch1 wrote:
>
>> In D141560#4198233 <https://reviews.llvm.org/D141560#4198233>, @craig.topper wrote:
>>
>>> In D141560#4198220 <https://reviews.llvm.org/D141560#4198220>, @joshua-arch1 wrote:
>>>
>>>> Anyone knows how to generate FLI from C-code? If I compile the following program, I cannot get FlI. ConstantFP will be converted to Constant in DAG.
>>>>
>>>>   void foo_double64 ()
>>>>   {
>>>>     volatile double a;
>>>>     a = 0.0625;
>>>>   }
>>>
>>> You just need to use it to do some floating point arithmetic
>>>
>>>   void foo_double64 (double x)
>>>   {
>>>     volatile double a;
>>>     a = x + 0.0625;
>>>   }
>>>
>>> or return a floating point value
>>>
>>>   double foo_double64 ()
>>>   {
>>>     return 0.0625;
>>>   }
>>
>> Is that because we cannot directly store a ConstantFP in DAG?
>
> The change is done in DAGCombiner::replaceStoreOfFPConstant. I think the idea is that FP constants are usually harder to create in registers than integer constants. Also CPUs  usually have more integer resources than FP resources. It doesn't look like it can be disabled currently. I think all of the constants FLI handles can be done in 1 or 2 integer instructions so I'm not very concerned about this. It was more than that I might be concerned.

Will one FLI instruction have less cycles and perform better than two integer instructions?


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