[llvm] 4bbee03 - [RISCV] Added tests to validate lower inline asm m and A with offsets

[Mikhail R. Gadelha via llvm-commits]

Author: Mikhail R. Gadelha
Date: 2023-03-16T13:12:39-03:00
New Revision: 4bbee03d8a242ed2817bf0145391e800235ef4ff

URL: https://github.com/llvm/llvm-project/commit/4bbee03d8a242ed2817bf0145391e800235ef4ff
DIFF: https://github.com/llvm/llvm-project/commit/4bbee03d8a242ed2817bf0145391e800235ef4ff.diff

LOG: [RISCV] Added tests to validate lower inline asm m and A with offsets

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/inline-asm.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/RISCV/inline-asm.ll b/llvm/test/CodeGen/RISCV/inline-asm.ll
index 4dfbb62c0eb88..ba78d722a16dd 100644
--- a/llvm/test/CodeGen/RISCV/inline-asm.ll
+++ b/llvm/test/CodeGen/RISCV/inline-asm.ll
@@ -82,6 +82,25 @@ define i32 @constraint_m2(ptr %a) nounwind {
   ret i32 %1
 }
 
+define i32 @constraint_m_with_offset(ptr %a) nounwind {
+; RV32I-LABEL: constraint_m_with_offset:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    addi a0, a0, 4
+; RV32I-NEXT:    #APP
+; RV32I-NEXT:    lw a0, 0(a0)
+; RV32I-NEXT:    #NO_APP
+; RV32I-NEXT:    ret
+;
+; RV64I-LABEL: constraint_m_with_offset:
+; RV64I:       # %bb.0:
+; RV64I-NEXT:    lw a0, 0(a0)
+; RV64I-NEXT:    #NO_APP
+; RV64I-NEXT:    ret
+  %1 = getelementptr i32, ptr %a, i32 1
+  %2 = tail call i32 asm "lw $0, $1", "=r,*m"(ptr elementtype(i32) %1)
+  ret i32 %2
+}
+
 define void @constraint_I() nounwind {
 ; RV32I-LABEL: constraint_I:
 ; RV32I:       # %bb.0:
@@ -175,6 +194,27 @@ define void @constraint_A(ptr %a) nounwind {
   ret void
 }
 
+define i32 @constraint_A_with_offset(ptr %a) nounwind {
+; RV32I-LABEL: constraint_A_with_offset:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    addi a0, a0, 4
+; RV32I-NEXT:    #APP
+; RV32I-NEXT:    lw a0, 0(a0)
+; RV32I-NEXT:    #NO_APP
+; RV32I-NEXT:    ret
+;
+; RV64I-LABEL: constraint_A_with_offset:
+; RV64I:       # %bb.0:
+; RV64I-NEXT:    addi a0, a0, 4
+; RV64I-NEXT:    #APP
+; RV64I-NEXT:    lw a0, 0(a0)
+; RV64I-NEXT:    #NO_APP
+; RV64I-NEXT:    ret
+  %1 = getelementptr i32, ptr %a, i32 1
+  %2 = tail call i32 asm "lw $0, $1", "=r,*A"(ptr elementtype(i32) %1)
+  ret i32 %2
+}
+
 define i32 @modifier_z_zero(i32 %a) nounwind {
 ; RV32I-LABEL: modifier_z_zero:
 ; RV32I:       # %bb.0: