[PATCH] D146198: [RISCV] Make ResourceCycles relevant to LMUL

[Wang Pengcheng via Phabricator via llvm-commits]

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When modeling vector WriteRes, there are some fields that we can
spcify to model its costs like `Latency`, `ResourceCycles`, etc.

For `Latency`, it may not be relevant to LMUL with mechanisms like
chaining[1].

But for `ResourceCycles`, it may be different. The cycles of some
resources can be relevant to LMUL. For example, the generation and
issuing of uops.

In this patch, we add a new template parameter `resourceCycles` to
`LMULWriteResImpl`. The `resourceCycles` is a list of `ResourceCycle`,
which can be `FixedResourceCycle` or `LMULResourceCycle`. With these
two kinds of `ResourceCycle`, we can model resources whose cycles
are fixed for different LMULs via `FixedResourceCycle` and resources
whose cycles are a multiple of LMUL via `LMULResourceCycle`.

References:
[1] Chaining (vector processing) <https://en.wikipedia.org/wiki/Chaining_(vector_processing)>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D146198

Files:
  llvm/lib/Target/RISCV/RISCVScheduleV.td

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