[PATCH] D146117: [RISCV]Optimize (riscvisd::select_cc x, 0, ne, x, 1)

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 15 19:36:14 PDT 2023


craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:10919
+           (isOneConstant(TrueV) && LHS == FalseV &&
+            CCVal == ISD::CondCode::SETEQ)) &&
+          isNullConstant(RHS)) {
----------------
liaolucy wrote:
> craig.topper wrote:
> > Are there any tests for the SETEQ case?
> I do not find LLVM IR that would cover the SETEQ case, perhaps a mir could be constructed?
> ```
>  %c = call i64 @llvm.umax.i64(i64 %a, i64 1)
>  %c = call i64 @llvm.umax.i64(i64 1, i64 %a)
> ```
> After Initial selection DAG, both are the same DAG. So both will be SETNE
> 
Ok. I think maybe it gets adjusted in LowerSelect to put the constant in the false operand.


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