[PATCH] D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name
Nitin John Raj via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 15 10:43:25 PDT 2023
nitinjohnraj marked an inline comment as not done.
nitinjohnraj added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVScheduleV.td:71
+ foreach mx = MxList in {
+ if !eq(mx, "UpperBound") then
+ def name # "_" # mx : SchedRead;
----------------
Same as line 62
================
Comment at: llvm/lib/Target/RISCV/RISCVScheduleV.td:80
+ foreach mx = SchedMxList in {
+ if !eq(mx, "UpperBound") then
+ def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
----------------
Same as line 62
================
Comment at: llvm/lib/Target/RISCV/RISCVScheduleV.td:90
+ foreach mx = SchedMxList in {
+ if !eq(mx, "UpperBound") then
+ def : ReadAdvance<!cast<SchedRead>(name # "_" # mx), val, writes>;
----------------
Same as line 62
================
Comment at: llvm/lib/Target/RISCV/RISCVScheduleV.td:114
+ if !eq(mx, "UpperBound") then
+ def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
+ else
----------------
michaelmaitland wrote:
> Why don't we make this case SEW aware?
Did we want to make UpperBound SEW-aware, or handle it in a different way? IIRC we discussed using it as a defined variable?
Repository:
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https://reviews.llvm.org/D144925/new/
https://reviews.llvm.org/D144925
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