[PATCH] D146117: [RISCV]Optimize select_cc x, 0, ne, x, 1
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 15 01:53:51 PDT 2023
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:10914
}
+ // select_cc x, 0, ne, x, 1 -> seqz y, x + add x, x, y
+ if (isNullConstant(RHS) && isOneConstant(FalseV) && LHS == TrueV &&
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This comment mixes SelectionDAG names and instruction names. Can we use SelectionDAG throughout?
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:10918
+ SDValue SLTIU =
+ DAG.getSetCC(DL, VT, LHS, FalseV, ISD::CondCode::SETULT);
+ return DAG.getNode(ISD::ADD, DL, VT, LHS, SLTIU);
----------------
Use seteq LHS, 0. That’s canonical.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D146117/new/
https://reviews.llvm.org/D146117
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