[llvm] cb45be2 - [RISCV][NFC] Combine identical switch cases in TTI

[Ben Shi via llvm-commits]

Author: Ben Shi
Date: 2023-03-15T08:27:58+08:00
New Revision: cb45be2b4f62f93493db9c95c66b452b2faa178f

URL: https://github.com/llvm/llvm-project/commit/cb45be2b4f62f93493db9c95c66b452b2faa178f
DIFF: https://github.com/llvm/llvm-project/commit/cb45be2b4f62f93493db9c95c66b452b2faa178f.diff

LOG: [RISCV][NFC] Combine identical switch cases in TTI

Reviewed By: craig.topper, asb

Differential Revision: https://reviews.llvm.org/D146008

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 07ca7b9af611..2bb26b8cfcc3 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -876,7 +876,9 @@ RISCVTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
   case Intrinsic::sadd_sat:
   case Intrinsic::ssub_sat:
   case Intrinsic::uadd_sat:
-  case Intrinsic::usub_sat: {
+  case Intrinsic::usub_sat:
+  case Intrinsic::fabs:
+  case Intrinsic::sqrt: {
     auto LT = getTypeLegalizationCost(RetTy);
     if (ST->hasVInstructions() && LT.second.isVector())
       return LT.first;
@@ -891,13 +893,6 @@ RISCVTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
     }
     break;
   }
-  case Intrinsic::fabs:
-  case Intrinsic::sqrt: {
-    auto LT = getTypeLegalizationCost(RetTy);
-    if (ST->hasVInstructions() && LT.second.isVector())
-      return LT.first;
-    break;
-  }
   // TODO: add more intrinsic
   case Intrinsic::experimental_stepvector: {
     unsigned Cost = 1; // vid