[llvm] c09730c - [RISCV] Pre-commit tests for D145897. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 14 13:11:18 PDT 2023
Author: Craig Topper
Date: 2023-03-14T13:11:11-07:00
New Revision: c09730c23e207accbf487a5142647c118630a5d2
URL: https://github.com/llvm/llvm-project/commit/c09730c23e207accbf487a5142647c118630a5d2
DIFF: https://github.com/llvm/llvm-project/commit/c09730c23e207accbf487a5142647c118630a5d2.diff
LOG: [RISCV] Pre-commit tests for D145897. NFC
Added:
Modified:
llvm/test/CodeGen/RISCV/double-zfa.ll
llvm/test/CodeGen/RISCV/half-zfa-fli.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/double-zfa.ll b/llvm/test/CodeGen/RISCV/double-zfa.ll
index 4b5b1f7c952d2..9dcb0c93562c3 100644
--- a/llvm/test/CodeGen/RISCV/double-zfa.ll
+++ b/llvm/test/CodeGen/RISCV/double-zfa.ll
@@ -87,6 +87,52 @@ define double @loadfpimm10() {
ret double 0x1000000000000000
}
+; Negative test. This is a qnan with payload of 1.
+define double @loadfpimm11() {
+; CHECK-LABEL: loadfpimm11:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lui a0, %hi(.LCPI10_0)
+; CHECK-NEXT: fld fa0, %lo(.LCPI10_0)(a0)
+; CHECK-NEXT: ret
+ ret double 0x7ff8000000000001
+}
+
+; Negative test. This is an snan with payload of 1.
+define double @loadfpimm12() {
+; CHECK-LABEL: loadfpimm12:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa0, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: ret
+ ret double 0x7ff0000000000001
+}
+
+; Negative test. This is the smallest denormal.
+define double @loadfpimm13() {
+; RV32IDZFA-LABEL: loadfpimm13:
+; RV32IDZFA: # %bb.0:
+; RV32IDZFA-NEXT: lui a0, %hi(.LCPI12_0)
+; RV32IDZFA-NEXT: fld fa0, %lo(.LCPI12_0)(a0)
+; RV32IDZFA-NEXT: ret
+;
+; RV64DZFA-LABEL: loadfpimm13:
+; RV64DZFA: # %bb.0:
+; RV64DZFA-NEXT: li a0, 1
+; RV64DZFA-NEXT: fmv.d.x fa0, a0
+; RV64DZFA-NEXT: ret
+ ret double 0x0000000000000001
+}
+
+; Negative test. This is 2^-1023, a denormal.
+define double @loadfpimm15() {
+; CHECK-LABEL: loadfpimm15:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa0, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: ret
+ ret double 0x0008000000000000
+}
+
declare double @llvm.minimum.f64(double, double)
define double @fminm_d(double %a, double %b) nounwind {
diff --git a/llvm/test/CodeGen/RISCV/half-zfa-fli.ll b/llvm/test/CodeGen/RISCV/half-zfa-fli.ll
index a02a48ff41743..f82ae5c00d159 100644
--- a/llvm/test/CodeGen/RISCV/half-zfa-fli.ll
+++ b/llvm/test/CodeGen/RISCV/half-zfa-fli.ll
@@ -164,3 +164,19 @@ define half @loadfpimm11() {
; ZFHMIN-NEXT: ret
ret half 0xH0200
}
+
+; Negative test. This is an snan with payload of 1.
+define half @loadfpimm12() {
+; CHECK-LABEL: loadfpimm12:
+; CHECK: # %bb.0:
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: flh fa0, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: ret
+;
+; ZFHMIN-LABEL: loadfpimm12:
+; ZFHMIN: # %bb.0:
+; ZFHMIN-NEXT: lui a0, %hi(.LCPI11_0)
+; ZFHMIN-NEXT: flh fa0, %lo(.LCPI11_0)(a0)
+; ZFHMIN-NEXT: ret
+ ret half 0xH7c01
+}
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