[PATCH] D140381: [PowerPC] Use Power9 test data class instruction to lower IS_FPCLASS
Serge Pavlov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 14 09:11:07 PDT 2023
sepavloff added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10958
+static SDValue getDataClassTest(SDValue Op, unsigned Mask, const SDLoc &Dl,
+ SelectionDAG &DAG,
----------------
It is better to use `FPClassTest` instead of `unsigned`.
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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10988
+ SDValue Rev =
+ getDataClassTest(Op, (~Mask) & fcAllFlags, Dl, DAG, Subtarget);
+ return DAG.getNOT(Dl, Rev, MVT::i1);
----------------
If `Mask` were `FPClassTest`, `& fcAllFlags` could be omitted.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10995
+ if ((Mask & fcNormal) != 0) {
+ SDValue Rest = getDataClassTest(Op, Mask & (fcAllFlags ^ fcNormal), Dl, DAG,
+ Subtarget);
----------------
Should it be `Mask & ~fcNormal`?
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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11065
+ unsigned NativeMask = 0;
+ if (Mask & fcNan)
+ NativeMask |= DC_NAN;
----------------
Should it be `(Mask & fcNan) == fcNan)`?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140381/new/
https://reviews.llvm.org/D140381
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