[PATCH] D146056: [AArch64][SVE] Fix the indexed addressing mode when FI = 0.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 14 08:28:05 PDT 2023
sdesmalen created this revision.
sdesmalen added reviewers: peterwaller-arm, paulwalker-arm, efriedma.
Herald added subscribers: psnobl, arphaman, hiraditya, kristof.beyls, tschuett.
Herald added a project: All.
sdesmalen requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
This is an alternative fix to D145497 <https://reviews.llvm.org/D145497>, which also addresses
https://github.com/llvm/llvm-project/issues/60918
In D124457 <https://reviews.llvm.org/D124457> which added the original code for this, @efriedma pointed
out that it wasn't safe to assume that FI #0 would be allocated at offset
0, but that part of the patch went in without any changes.
The downside of this solution is that any access to an object on the
stack that has been allocated at SP + 0, still gets moved to a separate
register first, which degrades performance.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D146056
Files:
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/test/CodeGen/AArch64/sve-fixed-ld2-alloca.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-frame-offests.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll
llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ld2-alloca.ll
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