[PATCH] D145900: [RISCV] Support ISD::STRICT_FADD/FSUB/FMUL/FDIV for vector types.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 13 21:14:09 PDT 2023


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td:838
 defm : VPatWidenBinaryFPSDNode_VV_VF_WV_WF<fadd, "PseudoVFWADD">;
+defm : VPatWidenBinaryFPSDNode_VV_VF_WV_WF<fadd, "PseudoVFWADD">;
 defm : VPatWidenBinaryFPSDNode_VV_VF_WV_WF<fsub, "PseudoVFWSUB">;
----------------
fakepaper56 wrote:
> fakepaper56 wrote:
> > craig.topper wrote:
> > > craig.topper wrote:
> > > > This looks identical to the line above.
> > > This line still looks identical to the line before it.
> > Sorry, I mis-filled the done status.
> The reason I didn't deal with widen operations now is we need to deal with `(any_fadd (any_fpextend))` and the test cases change may be too large to read. Is my concern over-thinking? Actually I don't know how large should a patch be ?
We can skip widening instructions for now.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145900/new/

https://reviews.llvm.org/D145900



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