[PATCH] D145900: [RISCV] Support ISD::STRICT_FADD/FSUB/FMUL/FDIV for vector types.

[Yeting Kuo via Phabricator via llvm-commits]

fakepaper56 updated this revision to Diff 504898.
fakepaper56 added a comment.

Use any_<op> to replace base operations and strict operations.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145900/new/

https://reviews.llvm.org/D145900

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfadd-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmul-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsub-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll

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