[PATCH] D145962: [lld] Fill .text section gaps with INT3 only on x86 targets.

[Jacek Caban via Phabricator via llvm-commits]

jacek created this revision.
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It doesn't make sense on ARM and using default 0 fill is compatible with MSVC.

(It's more noticeable ARM64EC targets, where additional padding mixed with alignment is used for entry thunk association, so there are more gaps).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145962

Files:
  lld/COFF/Writer.cpp
  lld/test/COFF/arm-thumb-thunks-multipass.s
  lld/test/COFF/arm64-import2.test
  lld/test/COFF/gaps-fill.test


Index: lld/test/COFF/gaps-fill.test
===================================================================
--- /dev/null
+++ lld/test/COFF/gaps-fill.test
@@ -0,0 +1,35 @@
+# REQUIRES: aarch64
+# RUN: split-file %s %t.dir
+
+# RUN: llvm-mc -filetype=obj -triple=aarch64-windows %t.dir/dllmain.s -o %t.dir/dllmain.obj
+# RUN: llvm-mc -filetype=obj -triple=aarch64-windows %t.dir/p4sym.s -o %t.dir/p4sym.obj
+# RUN: lld-link -dll -machine:arm64 %t.dir/dllmain.obj %t.dir/p4sym.obj -out:%t.dll
+
+# RUN: llvm-objdump -d %t.dll | FileCheck %s
+# CHECK: 180001000: 52800020     mov     w0, #0x1
+# CHECK: 180001004: d65f03c0     ret
+# CHECK:                         ...
+# CHECK: 180001010: 52800040     mov     w0, #0x2
+# CHECK: 180001014: d65f03c0     ret
+
+#--- dllmain.s
+        .def _DllMainCRTStartup;
+        .scl 2;
+        .type 32;
+        .endef
+        .globl _DllMainCRTStartup
+        .p2align 2
+_DllMainCRTStartup:
+        mov w0, #1
+        ret
+
+#--- p4sym.s
+        .def p4sym;
+        .scl 2;
+        .type 32;
+        .endef
+        .globl p4sym
+        .p2align 4
+p4sym:
+        mov w0, #2
+        ret
Index: lld/test/COFF/arm64-import2.test
===================================================================
--- lld/test/COFF/arm64-import2.test
+++ lld/test/COFF/arm64-import2.test
@@ -18,7 +18,7 @@
 # AFTER:  140001000:      94000004        bl      0x140001010
 # AFTER:  140001004:      94000006        bl      0x14000101c
 # AFTER:  140001008:      d65f03c0        ret
-# AFTER:  14000100c:      ccccccff        <unknown>
+# AFTER:  14000100c:      000000ff
 # AFTER:  140001010:      b0000010        adrp    x16, 0x140002000
 # AFTER:  140001014:      f9403210        ldr     x16, [x16, #96]
 # AFTER:  140001018:      d61f0200        br      x16
Index: lld/test/COFF/arm-thumb-thunks-multipass.s
===================================================================
--- lld/test/COFF/arm-thumb-thunks-multipass.s
+++ lld/test/COFF/arm-thumb-thunks-multipass.s
@@ -67,4 +67,4 @@
 // FUNC01-THUNKS: 40500a:       f2c0 0c10       movt    r12, #16
 // FUNC01-THUNKS: 40500e:       44e7            add     pc, r12
 // The instruction below is padding from the .balign
-// FUNC01-THUNKS: 405010:       cccc            ldm     r4!, {r2, r3, r6, r7}
+// FUNC01-THUNKS: 405010:       0000            movs    r0, r0
Index: lld/COFF/Writer.cpp
===================================================================
--- lld/COFF/Writer.cpp
+++ lld/COFF/Writer.cpp
@@ -1953,7 +1953,8 @@
     // Fill gaps between functions in .text with INT3 instructions
     // instead of leaving as NUL bytes (which can be interpreted as
     // ADD instructions).
-    if (sec->header.Characteristics & IMAGE_SCN_CNT_CODE)
+    if ((sec->header.Characteristics & IMAGE_SCN_CNT_CODE) &&
+        (ctx.config.machine == AMD64 || ctx.config.machine == I386))
       memset(secBuf, 0xCC, sec->getRawSize());
     parallelForEach(sec->chunks, [&](Chunk *c) {
       c->writeTo(secBuf + c->getRVA() - sec->getRVA());


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