[llvm] cfcf274 - [RISCV] Inline and delete RISCVTTIImpl::getSpliceCost [nfc]

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2023-03-13T08:55:32-07:00
New Revision: cfcf2742453be26b77f0872c2ef23b991ada1d20

URL: https://github.com/llvm/llvm-project/commit/cfcf2742453be26b77f0872c2ef23b991ada1d20
DIFF: https://github.com/llvm/llvm-project/commit/cfcf2742453be26b77f0872c2ef23b991ada1d20.diff

LOG: [RISCV] Inline and delete RISCVTTIImpl::getSpliceCost [nfc]

The code structure was copied from AArch64 which has a much more complicated splice cost model.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index ebf80a3e13e9..ae044711624e 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -243,15 +243,6 @@ RISCVTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
   llvm_unreachable("Unsupported register kind");
 }
 
-InstructionCost RISCVTTIImpl::getSpliceCost(VectorType *Tp, int Index) {
-  std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
-
-  unsigned Cost = 2; // vslidedown+vslideup.
-  // TODO: Multiplying by LT.first implies this legalizes into multiple copies
-  // of similar code, but I think we expand through memory.
-  return Cost * LT.first * getLMULCost(LT.second);
-}
-
 InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
                                              VectorType *Tp, ArrayRef<int> Mask,
                                              TTI::TargetCostKind CostKind,
@@ -270,7 +261,10 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
       return LT.first * 1;
     }
     case TTI::SK_Splice:
-      return getSpliceCost(Tp, Index);
+      // vslidedown+vslideup.
+      // TODO: Multiplying by LT.first implies this legalizes into multiple copies
+      // of similar code, but I think we expand through memory.
+      return 2 * LT.first * getLMULCost(LT.second);
     case TTI::SK_Reverse:
       // Most of the cost here is producing the vrgather index register
       // Example sequence:

diff  --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
index 6646bd1d06e4..cdc0bcc2e27f 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -113,7 +113,6 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
     return ST->useRVVForFixedLengthVectors() ? 16 : 0;
   }
 
-  InstructionCost getSpliceCost(VectorType *Tp, int Index);
   InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp,
                                  ArrayRef<int> Mask,
                                  TTI::TargetCostKind CostKind, int Index,