[PATCH] D145867: [X86][FP16] Optimize FMAXNUM/FMINNUM into SMAX/SMIN for FP16 emulation under fast math
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 12 17:46:20 PDT 2023
pengfei planned changes to this revision.
pengfei added a comment.
The negative comparison is not correct.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:53178
+ }
+ SDValue Res = DAG.getNode(MinMaxOp, DL, NVT, DAG.getBitcast(NVT, Op0),
+ DAG.getBitcast(NVT, Op1));
----------------
LuoYuanke wrote:
> I forget the encoding of exponent. Is the result same for min(vXf16) and min(i16)?
Thanks for the reminding. Review it again, I found it is only correct to positive value. The reason is FP is represented in `Sign-Magnitude` while integer is `2’s Complement Code`. Let me try to think out some way to solve it.
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https://reviews.llvm.org/D145867/new/
https://reviews.llvm.org/D145867
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