[PATCH] D145855: [X86] matchAddressRecursively - support zext(and(shl(x,c1)),c2) -> shl(zext(and(x, c2 >> c1),c1)

[Phoebe Wang via Phabricator via llvm-commits]

pengfei accepted this revision.
pengfei added a comment.
This revision is now accepted and ready to land.

LGTM.



================
Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:2515
+    APInt HighZeros = APInt::getHighBitsSet(ShlSrc.getValueSizeInBits(),
                                             ShAmtC->getZExtValue());
+    if (!CurDAG->MaskedValueIsZero(ShlSrc, HighZeros & Mask))
----------------
Nit: this should also be common out e.g., `unsigned ShAmtV = ShAmtC->getZExtValue()`.


Repository:
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  https://reviews.llvm.org/D145855/new/

https://reviews.llvm.org/D145855