[PATCH] D145198: [ASAN] Support memory checks on scalable vector typed masked load and store

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp:1515
+  Value *NumElements =
+    isa<FixedVectorType>(VTy) ? MinNumElem : IRB.CreateVScale(MinNumElem);
+
----------------
Can it be a FixedVectorType here?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145198/new/

https://reviews.llvm.org/D145198