[PATCH] D143723: [RISCV] Increase default vectorizer LMUL to 2

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 9 20:17:30 PST 2023


craig.topper added inline comments.


================
Comment at: llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll:2
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+v -S | FileCheck %s -check-prefix=LMUL1
+; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+v -S | FileCheck %s -check-prefix=LMUL2
 ; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+v -S --riscv-v-register-bit-width-lmul=1 | FileCheck %s -check-prefix=LMUL1
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If we put this RUN line last, will it prevent the script from reordering the rest of the file?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143723/new/

https://reviews.llvm.org/D143723



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