[PATCH] D145155: [RISCV] Enable interleaved access vectorization

[Luke Lau via Phabricator via llvm-commits]

luke added inline comments.


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Comment at: llvm/test/Transforms/LoopVectorize/RISCV/interleaved-cost.ll:1
+; RUN: opt -passes=loop-vectorize -mtriple=riscv64 -mattr=+v -force-vector-width=2 -debug-only=loop-vectorize -disable-output < %s 2>&1 | FileCheck %s --check-prefix=VF_2
+; RUN: opt -passes=loop-vectorize -mtriple=riscv64 -mattr=+v -force-vector-width=4 -debug-only=loop-vectorize -disable-output < %s 2>&1 | FileCheck %s --check-prefix=VF_4
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Unfortunately there doesn't seem to be a way to print out the result of `getInterleavedMemoryOpCost` other than via -debug-only=loop-vectorize. i.e. It's not called in getInstructionCost


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145155/new/

https://reviews.llvm.org/D145155