[PATCH] D144759: [AMDGPU] Implement idempotent atomic lowering
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 8 13:29:42 PST 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:13448
+ // Avoid replacing of an atomicrmw with a release semantics.
+ if (isReleaseOrStronger(AI->getOrdering()))
+ return nullptr;
----------------
Didn't use Order saved above
================
Comment at: llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll:3
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX940 %s
+
+define i32 @global_agent_monotonic_idempotent_or(ptr addrspace(1) %in) {
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Should include an IR run line
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D144759/new/
https://reviews.llvm.org/D144759
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