[PATCH] D145548: [IR][DAG][RISCV] Allow scalable vector ISD::STRICT_FP_EXTEND and RISC-V supports for vector ISD::STRICT_FP_EXTEND.

[Craig Topper via Phabricator via llvm-commits]

craig.topper requested changes to this revision.
craig.topper added inline comments.
This revision now requires changes to proceed.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.h:252
   FP_EXTEND_VL,
+  STRICT_FP_EXTEND_VL,
 
----------------
craig.topper wrote:
> There's a special place in the enum for STRICT opcodes. Look for `STRICT_FCVT_WU_RV64`.
This was not addressed.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145548/new/

https://reviews.llvm.org/D145548