[PATCH] D145572: [llvm][Uniformity] consistently handle uniform instructions

[Sameer Sahasrabuddhe via Phabricator via llvm-commits]

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An instruction that is "always uniform" is so even if it occurs in an
irreducible cycle. The output produced by such an instruction may depend on the
implementation defined cycle hierarchy, but that does not affect the uniformity
of the output. In other words, an "always uniform" instruction is uniform even
if it is not m-converged.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145572

Files:
  llvm/include/llvm/ADT/GenericUniformityImpl.h
  llvm/lib/Analysis/UniformityAnalysis.cpp
  llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
  llvm/test/Analysis/DivergenceAnalysis/AMDGPU/irreducible/irreducible-2.ll

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