[PATCH] D136918: [AMDGPU] Scheduler: fix RP calculation for a MBB with one successor
Valery Pykhtin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 8 03:20:19 PST 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa999669982d0: [AMDGPU] Scheduler: fix RP calculation for a MBB with one successor (authored by vpykhtin).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136918/new/
https://reviews.llvm.org/D136918
Files:
llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
Index: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -511,11 +511,19 @@
// If the block has the only successor then live-ins of that successor are
// live-outs of the current block. We can reuse calculated live set if the
// successor will be sent to scheduling past current block.
+
+ // However, due to the bug in LiveInterval analysis it may happen that two
+ // predecessors of the same successor block have different lane bitmasks for
+ // a live-out register. Workaround that by sticking to one-to-one relationship
+ // i.e. one predecessor with one successor block.
const MachineBasicBlock *OnlySucc = nullptr;
- if (MBB->succ_size() == 1 && !(*MBB->succ_begin())->empty()) {
- SlotIndexes *Ind = LIS->getSlotIndexes();
- if (Ind->getMBBStartIdx(MBB) < Ind->getMBBStartIdx(*MBB->succ_begin()))
- OnlySucc = *MBB->succ_begin();
+ if (MBB->succ_size() == 1) {
+ auto *Candidate = *MBB->succ_begin();
+ if (!Candidate->empty() && Candidate->pred_size() == 1) {
+ SlotIndexes *Ind = LIS->getSlotIndexes();
+ if (Ind->getMBBStartIdx(MBB) < Ind->getMBBStartIdx(Candidate))
+ OnlySucc = Candidate;
+ }
}
// Scheduler sends regions from the end of the block upwards.
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