[llvm] 5541f47 - [PowerPC] Check if the latch block is in the value list for the PHI before get the incoming value.

via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 7 23:21:05 PST 2023


Author: esmeyi
Date: 2023-03-08T02:19:35-05:00
New Revision: 5541f47326e0ec2e26eb2929f30d46e32c5743fc

URL: https://github.com/llvm/llvm-project/commit/5541f47326e0ec2e26eb2929f30d46e32c5743fc
DIFF: https://github.com/llvm/llvm-project/commit/5541f47326e0ec2e26eb2929f30d46e32c5743fc.diff

LOG: [PowerPC] Check if the latch block is in the value list for the PHI before get the incoming value.

Summary: Fixes #60990. There is a crash reported during Running pass 'Prepare loop for ppc preferred instruction forms'. The crash occurs in 32bit PowerPC.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D145350

Added: 
    llvm/test/CodeGen/PowerPC/loop-instr-form-non-inc.ll

Modified: 
    llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp b/llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
index 999b0b06baa62..8710956e47ec8 100644
--- a/llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
+++ b/llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
@@ -1179,6 +1179,8 @@ Value *PPCLoopInstrFormPrep::getNodeForInc(Loop *L, Instruction *MemI,
 
     // Get the incoming value from the loop latch and check if the value has
     // the add form with the required increment.
+    if (CurrentPHINode->getBasicBlockIndex(LatchBB) < 0)
+      continue;
     if (Instruction *I = dyn_cast<Instruction>(
             CurrentPHINode->getIncomingValueForBlock(LatchBB))) {
       Value *StrippedBaseI = I;

diff  --git a/llvm/test/CodeGen/PowerPC/loop-instr-form-non-inc.ll b/llvm/test/CodeGen/PowerPC/loop-instr-form-non-inc.ll
new file mode 100644
index 0000000000000..93697ec06be2c
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/loop-instr-form-non-inc.ll
@@ -0,0 +1,39 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu \
+; RUN:   -mcpu=pwr9 < %s | FileCheck %s
+
+define dso_local void @test_no_inc(i32 signext %a) local_unnamed_addr nounwind align 2 {
+; CHECK-LABEL: test_no_inc:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    srawi 4, 3, 31
+; CHECK-NEXT:    cmpwi 3, 0
+; CHECK-NEXT:    li 6, 1
+; CHECK-NEXT:    li 7, 0
+; CHECK-NEXT:    andc 4, 3, 4
+; CHECK-NEXT:    addi 5, 4, 1
+; CHECK-NEXT:    .p2align 5
+; CHECK-NEXT:  .LBB0_1: # %for.cond
+; CHECK-NEXT:    #
+; CHECK-NEXT:    add 8, 3, 6
+; CHECK-NEXT:    stb 7, 0(5)
+; CHECK-NEXT:    add 5, 5, 4
+; CHECK-NEXT:    iselgt 6, 8, 6
+; CHECK-NEXT:    b .LBB0_1
+entry:
+  %cmp10 = icmp sgt i32 %a, 0
+  br label %for.cond
+
+for.cond:                                         ; preds = %for.cond.cleanup, %entry
+  %g.0 = phi i32 [ 1, %entry ], [ %g.1.lcssa, %for.cond.cleanup ]
+  br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup
+
+for.body.preheader:                               ; preds = %for.cond
+  %0 = add i32 %a, %g.0
+  br label %for.cond.cleanup
+
+for.cond.cleanup:                                 ; preds = %for.body.preheader, %for.cond
+  %g.1.lcssa = phi i32 [ %g.0, %for.cond ], [ %0, %for.body.preheader ]
+  %arrayidx5 = getelementptr inbounds i8, ptr null, i32 %g.1.lcssa
+  store i8 0, ptr %arrayidx5, align 1
+  br label %for.cond
+}


        


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