[llvm] 912404d - [ControlHeightReduction] Freeze potentially poisonous conditions
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 7 13:20:28 PST 2023
Author: Kazu Hirata
Date: 2023-03-07T13:20:21-08:00
New Revision: 912404db7882084bc2a5fa417746952bee04e26a
URL: https://github.com/llvm/llvm-project/commit/912404db7882084bc2a5fa417746952bee04e26a
DIFF: https://github.com/llvm/llvm-project/commit/912404db7882084bc2a5fa417746952bee04e26a.diff
LOG: [ControlHeightReduction] Freeze potentially poisonous conditions
This patch freezes potentially poisonous conditions in conditional
branches so that we do not "move up" conditional branches
"br i1 poison".
Differential Revision: https://reviews.llvm.org/D145008
Added:
llvm/test/Transforms/PGOProfile/chr-poison.ll
Modified:
llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
llvm/test/Transforms/PGOProfile/chr.ll
llvm/test/Transforms/PGOProfile/chr_coro.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp b/llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
index 83e662906bceb..327b500cb7df5 100644
--- a/llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
+++ b/llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
@@ -1962,11 +1962,8 @@ void CHR::addToMergedCondition(bool IsTrueBiased, Value *Cond,
Cond = IRB.CreateXor(ConstantInt::getTrue(F.getContext()), Cond);
}
- // Select conditions can be poison, while branching on poison is immediate
- // undefined behavior. As such, we need to freeze potentially poisonous
- // conditions derived from selects.
- if (isa<SelectInst>(BranchOrSelect) &&
- !isGuaranteedNotToBeUndefOrPoison(Cond))
+ // Freeze potentially poisonous conditions.
+ if (!isGuaranteedNotToBeUndefOrPoison(Cond))
Cond = IRB.CreateFreeze(Cond);
// Use logical and to avoid propagating poison from later conditions.
diff --git a/llvm/test/Transforms/PGOProfile/chr-poison.ll b/llvm/test/Transforms/PGOProfile/chr-poison.ll
new file mode 100644
index 0000000000000..52d555e0b019e
--- /dev/null
+++ b/llvm/test/Transforms/PGOProfile/chr-poison.ll
@@ -0,0 +1,89 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes='require<profile-summary>,function(chr)' -S | FileCheck %s
+
+; Make sure we freeze poison.
+define void @chr_poison(i1 %arg) !prof !15 {
+; CHECK-LABEL: @chr_poison(
+; CHECK-NEXT: [[TMP1:%.*]] = freeze i1 poison
+; CHECK-NEXT: [[TMP2:%.*]] = select i1 true, i1 [[TMP1]], i1 false
+; CHECK-NEXT: [[TMP3:%.*]] = freeze i1 [[ARG:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP2]], i1 [[TMP3]], i1 false
+; CHECK-NEXT: br i1 [[TMP4]], label [[DOTSPLIT:%.*]], label [[DOTSPLIT_NONCHR:%.*]], !prof [[PROF30:![0-9]+]]
+; CHECK: .split:
+; CHECK-NEXT: br i1 false, label [[BB3:%.*]], label [[BB4:%.*]]
+; CHECK: bb3:
+; CHECK-NEXT: [[SEL:%.*]] = select i1 false, ptr null, ptr null
+; CHECK-NEXT: br label [[BB6:%.*]]
+; CHECK: bb4:
+; CHECK-NEXT: br i1 true, label [[BB6]], label [[BB5:%.*]], !prof [[PROF31:![0-9]+]]
+; CHECK: bb5:
+; CHECK-NEXT: br label [[BB6]]
+; CHECK: bb6:
+; CHECK-NEXT: br i1 false, label [[BB9:%.*]], label [[BB7:%.*]]
+; CHECK: bb7:
+; CHECK-NEXT: br i1 true, label [[BB9]], label [[BB8:%.*]], !prof [[PROF32:![0-9]+]]
+; CHECK: bb8:
+; CHECK-NEXT: br label [[BB9]]
+; CHECK: .split.nonchr:
+; CHECK-NEXT: br i1 false, label [[BB3_NONCHR:%.*]], label [[BB4_NONCHR:%.*]]
+; CHECK: bb3.nonchr:
+; CHECK-NEXT: [[SEL_NONCHR:%.*]] = select i1 false, ptr null, ptr null
+; CHECK-NEXT: br label [[BB6_NONCHR:%.*]]
+; CHECK: bb4.nonchr:
+; CHECK-NEXT: br i1 poison, label [[BB6_NONCHR]], label [[BB5_NONCHR:%.*]], !prof [[PROF31]]
+; CHECK: bb5.nonchr:
+; CHECK-NEXT: br label [[BB6_NONCHR]]
+; CHECK: bb6.nonchr:
+; CHECK-NEXT: br i1 false, label [[BB9]], label [[BB7_NONCHR:%.*]]
+; CHECK: bb7.nonchr:
+; CHECK-NEXT: br i1 [[ARG]], label [[BB9]], label [[BB8_NONCHR:%.*]], !prof [[PROF32]]
+; CHECK: bb8.nonchr:
+; CHECK-NEXT: br label [[BB9]]
+; CHECK: bb9:
+; CHECK-NEXT: ret void
+;
+ br i1 false, label %bb3, label %bb4
+
+bb3:
+ %sel = select i1 false, ptr null, ptr null
+ br label %bb6
+
+bb4:
+ br i1 poison, label %bb6, label %bb5, !prof !16
+
+bb5:
+ br label %bb6
+
+bb6:
+ br i1 false, label %bb9, label %bb7
+
+bb7:
+ br i1 %arg, label %bb9, label %bb8, !prof !17
+
+bb8:
+ br label %bb9
+
+bb9:
+ ret void
+}
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 1, !"ProfileSummary", !1}
+!1 = !{!2, !3, !4, !5, !6, !7, !8, !9, !10, !11}
+!2 = !{!"ProfileFormat", !"SampleProfile"}
+!3 = !{!"TotalCount", i64 2625732223}
+!4 = !{!"MaxCount", i64 6099111}
+!5 = !{!"MaxInternalCount", i64 0}
+!6 = !{!"MaxFunctionCount", i64 1000000}
+!7 = !{!"NumCounts", i64 1000000}
+!8 = !{!"NumFunctions", i64 14940}
+!9 = !{!"IsPartialProfile", i64 0}
+!10 = !{!"PartialProfileRatio", double 0.000000e+00}
+!11 = !{!"DetailedSummary", !12}
+!12 = !{!13, !14}
+!13 = !{i32 100000, i64 6083920, i32 44}
+!14 = !{i32 999999, i64 1, i32 1000000}
+!15 = !{!"function_entry_count", i64 1000}
+!16 = !{!"branch_weights", i32 1, i32 0}
+!17 = !{!"branch_weights", i32 1, i32 0}
diff --git a/llvm/test/Transforms/PGOProfile/chr.ll b/llvm/test/Transforms/PGOProfile/chr.ll
index 124bc5010fe5c..43cb6a2224de9 100644
--- a/llvm/test/Transforms/PGOProfile/chr.ll
+++ b/llvm/test/Transforms/PGOProfile/chr.ll
@@ -26,7 +26,8 @@ define void @test_chr_1(ptr %i) !prof !14 {
; CHECK-LABEL: @test_chr_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
+; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15:![0-9]+]]
; CHECK: bb0:
@@ -34,14 +35,14 @@ define void @test_chr_1(ptr %i) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB3:%.*]]
; CHECK: entry.split.nonchr:
-; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 1
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16:![0-9]+]]
; CHECK: bb0.nonchr:
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB1_NONCHR]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 2
+; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 2
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
; CHECK-NEXT: br i1 [[TMP5]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb2.nonchr:
@@ -99,7 +100,8 @@ define void @test_chr_1_1(ptr %i) !prof !14 {
; CHECK-LABEL: @test_chr_1_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 7
+; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 7
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 7
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb0:
@@ -107,21 +109,21 @@ define void @test_chr_1_1(ptr %i) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB5:%.*]]
; CHECK: entry.split.nonchr:
-; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 1
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb0.nonchr:
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB1_NONCHR]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 2
+; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 2
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
; CHECK-NEXT: br i1 [[TMP5]], label [[BB2_NONCHR:%.*]], label [[BB3_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb2.nonchr:
; CHECK-NEXT: call void @bar()
; CHECK-NEXT: br label [[BB3_NONCHR]]
; CHECK: bb3.nonchr:
-; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP0]], 4
+; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 4
; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
; CHECK-NEXT: br i1 [[TMP7]], label [[BB5]], label [[BB4_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb4.nonchr:
@@ -185,7 +187,8 @@ define void @test_chr_2(ptr %i) !prof !14 {
; CHECK-LABEL: @test_chr_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
+; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb1:
@@ -193,15 +196,15 @@ define void @test_chr_2(ptr %i) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB4:%.*]]
; CHECK: entry.split.nonchr:
-; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 255
+; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 255
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB4]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb0.nonchr:
-; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 1
+; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 1
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
; CHECK-NEXT: br i1 [[TMP5]], label [[BB2_NONCHR:%.*]], label [[BB1_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb2.nonchr:
-; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP0]], 2
+; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 2
; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
; CHECK-NEXT: br i1 [[TMP7]], label [[BB4]], label [[BB3_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb3.nonchr:
@@ -278,7 +281,8 @@ define void @test_chr_3(ptr %i) !prof !14 {
; CHECK-LABEL: @test_chr_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
+; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb0:
@@ -286,14 +290,14 @@ define void @test_chr_3(ptr %i) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB3:%.*]]
; CHECK: entry.split.nonchr:
-; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 1
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb0.nonchr:
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB1_NONCHR]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 2
+; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 2
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
; CHECK-NEXT: br i1 [[TMP5]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb2.nonchr:
@@ -301,7 +305,8 @@ define void @test_chr_3(ptr %i) !prof !14 {
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[I]], align 4
-; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP6]], 12
+; CHECK-NEXT: [[DOTFR2:%.*]] = freeze i32 [[TMP6]]
+; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[DOTFR2]], 12
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 12
; CHECK-NEXT: br i1 [[TMP8]], label [[BB4:%.*]], label [[BB3_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb4:
@@ -309,14 +314,14 @@ define void @test_chr_3(ptr %i) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB7:%.*]]
; CHECK: bb3.split.nonchr:
-; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP6]], 4
-; CHECK-NEXT: [[DOTNOT1:%.*]] = icmp eq i32 [[TMP9]], 0
-; CHECK-NEXT: br i1 [[DOTNOT1]], label [[BB5_NONCHR:%.*]], label [[BB4_NONCHR:%.*]], !prof [[PROF16]]
+; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[DOTFR2]], 4
+; CHECK-NEXT: [[DOTNOT3:%.*]] = icmp eq i32 [[TMP9]], 0
+; CHECK-NEXT: br i1 [[DOTNOT3]], label [[BB5_NONCHR:%.*]], label [[BB4_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb4.nonchr:
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB5_NONCHR]]
; CHECK: bb5.nonchr:
-; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP6]], 8
+; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[DOTFR2]], 8
; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
; CHECK-NEXT: br i1 [[TMP11]], label [[BB7]], label [[BB6_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb6.nonchr:
@@ -546,17 +551,18 @@ bb3:
define i32 @test_chr_5_1(ptr %i, i32 %sum0) !prof !14 {
; CHECK-LABEL: @test_chr_5_1(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[SUM0_FR:%.*]] = freeze i32 [[SUM0:%.*]]
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SUM0:%.*]], 4
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SUM0_FR]], 4
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 11
; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 11
-; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i1 [[TMP2]], i1 false
+; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP2]]
; CHECK-NEXT: br i1 [[TMP5]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb0:
-; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[SUM0]], 85
-; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[SUM0]], 173
+; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[SUM0_FR]], 85
+; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[SUM0_FR]], 173
; CHECK-NEXT: br label [[BB3:%.*]]
; CHECK: entry.split.nonchr:
; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[DOTFR1]], 255
@@ -565,13 +571,13 @@ define i32 @test_chr_5_1(ptr %i, i32 %sum0) !prof !14 {
; CHECK: bb0.nonchr:
; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[DOTFR1]], 1
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP9]], 0
-; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[SUM0]], 42
-; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP10]], i32 [[SUM0]], i32 [[TMP11]], !prof [[PROF16]]
+; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[SUM0_FR]], 42
+; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP10]], i32 [[SUM0_FR]], i32 [[TMP11]], !prof [[PROF16]]
; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[DOTFR1]], 2
; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 0
; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[SUM1_NONCHR]], 43
; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP13]], i32 [[SUM1_NONCHR]], i32 [[TMP14]], !prof [[PROF16]]
-; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[SUM0]], 4
+; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[SUM0_FR]], 4
; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0
; CHECK-NEXT: [[TMP17:%.*]] = and i32 [[DOTFR1]], 8
; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP17]], 0
@@ -580,7 +586,7 @@ define i32 @test_chr_5_1(ptr %i, i32 %sum0) !prof !14 {
; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP16]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof [[PROF16]]
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
-; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP7]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
+; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP7]], [[BB0]] ], [ [[SUM0_FR]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
; CHECK-NEXT: ret i32 [[SUM6]]
;
entry:
@@ -650,11 +656,12 @@ define i32 @test_chr_6(ptr %i, ptr %j, i32 %sum0) !prof !14 {
; CHECK-NEXT: [[I0:%.*]] = load i32, ptr [[I:%.*]], align 4
; CHECK-NEXT: [[I0_FR:%.*]] = freeze i32 [[I0]]
; CHECK-NEXT: [[J0:%.*]] = load i32, ptr [[J:%.*]], align 4
-; CHECK-NEXT: [[V9:%.*]] = and i32 [[J0]], 4
+; CHECK-NEXT: [[J0_FR:%.*]] = freeze i32 [[J0]]
+; CHECK-NEXT: [[V9:%.*]] = and i32 [[J0_FR]], 4
; CHECK-NEXT: [[V10:%.*]] = icmp ne i32 [[V9]], 0
; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[I0_FR]], 10
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 10
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i1 [[V10]], i1 false
+; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[V10]]
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb0:
; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 43
@@ -669,7 +676,7 @@ define i32 @test_chr_6(ptr %i, ptr %j, i32 %sum0) !prof !14 {
; CHECK-NEXT: [[V4_NONCHR:%.*]] = icmp eq i32 [[V3_NONCHR]], 0
; CHECK-NEXT: [[V8_NONCHR:%.*]] = add i32 [[SUM0]], 43
; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[V4_NONCHR]], i32 [[SUM0]], i32 [[V8_NONCHR]], !prof [[PROF16]]
-; CHECK-NEXT: [[V9_NONCHR:%.*]] = and i32 [[J0]], 4
+; CHECK-NEXT: [[V9_NONCHR:%.*]] = and i32 [[J0_FR]], 4
; CHECK-NEXT: [[V10_NONCHR:%.*]] = icmp eq i32 [[V9_NONCHR]], 0
; CHECK-NEXT: [[V11_NONCHR:%.*]] = and i32 [[I0_FR]], 8
; CHECK-NEXT: [[V12_NONCHR:%.*]] = icmp eq i32 [[V11_NONCHR]], 0
@@ -804,7 +811,8 @@ define i32 @test_chr_7_1(ptr %i, ptr %j, i32 %sum0) !prof !14 {
; CHECK-NEXT: [[I0:%.*]] = load i32, ptr [[I:%.*]], align 4
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: [[J0:%.*]] = load i32, ptr [[J:%.*]], align 4
-; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[J0]], 12
+; CHECK-NEXT: [[J0_FR:%.*]] = freeze i32 [[J0]]
+; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[J0_FR]], 12
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 12
; CHECK-NEXT: br i1 [[TMP1]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb0:
@@ -812,14 +820,14 @@ define i32 @test_chr_7_1(ptr %i, ptr %j, i32 %sum0) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB3:%.*]]
; CHECK: entry.split.nonchr:
-; CHECK-NEXT: [[V9:%.*]] = and i32 [[J0]], 4
+; CHECK-NEXT: [[V9:%.*]] = and i32 [[J0_FR]], 4
; CHECK-NEXT: [[V10_NOT:%.*]] = icmp eq i32 [[V9]], 0
; CHECK-NEXT: br i1 [[V10_NOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb0.nonchr:
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB1_NONCHR]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[V11_NONCHR:%.*]] = and i32 [[J0]], 8
+; CHECK-NEXT: [[V11_NONCHR:%.*]] = and i32 [[J0_FR]], 8
; CHECK-NEXT: [[V12_NONCHR:%.*]] = icmp eq i32 [[V11_NONCHR]], 0
; CHECK-NEXT: br i1 [[V12_NONCHR]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb2.nonchr:
@@ -944,7 +952,8 @@ define i32 @test_chr_9(ptr %i, ptr %j) !prof !14 {
; CHECK-LABEL: @test_chr_9(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
+; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb0:
@@ -953,14 +962,14 @@ define i32 @test_chr_9(ptr %i, ptr %j) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB3:%.*]]
; CHECK: entry.split.nonchr:
-; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 1
+; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 1
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP4]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb0.nonchr:
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB1_NONCHR]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 2
+; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[DOTFR1]], 2
; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb2.nonchr:
@@ -968,7 +977,7 @@ define i32 @test_chr_9(ptr %i, ptr %j) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
-; CHECK-NEXT: [[TMP8:%.*]] = phi i32 [ [[TMP3]], [[BB0]] ], [ [[TMP0]], [[BB1_NONCHR]] ], [ [[TMP7]], [[BB2_NONCHR]] ]
+; CHECK-NEXT: [[TMP8:%.*]] = phi i32 [ [[TMP3]], [[BB0]] ], [ [[DOTFR1]], [[BB1_NONCHR]] ], [ [[TMP7]], [[BB2_NONCHR]] ]
; CHECK-NEXT: ret i32 [[TMP8]]
;
entry:
@@ -1025,7 +1034,8 @@ define i32 @test_chr_10(ptr %i, ptr %j) !prof !14 {
; CHECK-LABEL: @test_chr_10(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
+; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb0:
@@ -1034,7 +1044,7 @@ define i32 @test_chr_10(ptr %i, ptr %j) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB3:%.*]]
; CHECK: entry.split.nonchr:
-; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 1
+; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 1
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP4]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb0.nonchr:
@@ -1042,7 +1052,7 @@ define i32 @test_chr_10(ptr %i, ptr %j) !prof !14 {
; CHECK-NEXT: br label [[BB1_NONCHR]]
; CHECK: bb1.nonchr:
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[J]], align 4
-; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP0]], 2
+; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 2
; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
; CHECK-NEXT: br i1 [[TMP7]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb2.nonchr:
@@ -1115,14 +1125,16 @@ define void @test_chr_11(ptr %i, i32 %x) !prof !14 {
; CHECK-LABEL: @test_chr_11(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 1
+; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 1
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to double
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[DOTFR1]] to double
; CHECK-NEXT: [[DIV:%.*]] = fdiv double 1.000000e+00, [[CONV]]
; CHECK-NEXT: [[MUL16:%.*]] = fmul double [[DIV]], [[CONV]]
; CHECK-NEXT: [[CONV717:%.*]] = fptosi double [[MUL16]] to i32
-; CHECK-NEXT: [[CMP18:%.*]] = icmp sgt i32 [[CONV717]], 0
-; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i1 [[CMP18]], i1 false
+; CHECK-NEXT: [[CONV717_FR:%.*]] = freeze i32 [[CONV717]]
+; CHECK-NEXT: [[CMP18:%.*]] = icmp sgt i32 [[CONV717_FR]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[CMP18]]
; CHECK-NEXT: br i1 [[TMP3]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb0:
; CHECK-NEXT: call void @foo()
@@ -1134,7 +1146,7 @@ define void @test_chr_11(ptr %i, i32 %x) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB1_NONCHR]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[CONV_NONCHR:%.*]] = sitofp i32 [[TMP0]] to double
+; CHECK-NEXT: [[CONV_NONCHR:%.*]] = sitofp i32 [[DOTFR1]] to double
; CHECK-NEXT: [[DIV_NONCHR:%.*]] = fdiv double 1.000000e+00, [[CONV_NONCHR]]
; CHECK-NEXT: [[MUL16_NONCHR:%.*]] = fmul double [[DIV_NONCHR]], [[CONV_NONCHR]]
; CHECK-NEXT: [[CONV717_NONCHR:%.*]] = fptosi double [[MUL16_NONCHR]] to i32
@@ -1177,22 +1189,23 @@ define i32 @test_chr_12(ptr %i, i32 %sum0) !prof !14 {
; CHECK-LABEL: @test_chr_12(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 255
+; CHECK-NEXT: [[DOTFR2:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR2]], 255
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP2]], label [[BB3:%.*]], label [[BB0:%.*]], !prof [[PROF16]]
; CHECK: bb0:
-; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR2]], 1
; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[SUM0:%.*]], 42
; CHECK-NEXT: [[SUM1:%.*]] = select i1 [[TMP4]], i32 [[SUM0]], i32 [[TMP5]], !prof [[PROF16]]
-; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR1]], 2
+; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[DOTFR2]], 2
; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM1]], 43
; CHECK-NEXT: [[SUM2:%.*]] = select i1 [[TMP7]], i32 [[SUM1]], i32 [[TMP8]], !prof [[PROF16]]
; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
-; CHECK-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
-; CHECK-NEXT: [[TMP11:%.*]] = and i32 [[DOTFR1]], 8
+; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[TMP9]]
+; CHECK-NEXT: [[TMP10:%.*]] = icmp ne i32 [[DOTFR]], 0
+; CHECK-NEXT: [[TMP11:%.*]] = and i32 [[DOTFR2]], 8
; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP10]], [[TMP12]]
; CHECK-NEXT: br i1 [[TMP13]], label [[BB1:%.*]], label [[BB0_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
@@ -1202,7 +1215,7 @@ define i32 @test_chr_12(ptr %i, i32 %sum0) !prof !14 {
; CHECK: bb0.split.nonchr:
; CHECK-NEXT: br i1 [[TMP10]], label [[BB1_NONCHR:%.*]], label [[BB3]], !prof [[PROF18]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[DOTFR1]], 8
+; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[DOTFR2]], 8
; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0
; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP16]], i32 44, i32 88, !prof [[PROF16]]
; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2]], [[SUM4_NONCHR_V]]
@@ -1285,11 +1298,12 @@ define i32 @test_chr_14(ptr %i, ptr %j, i32 %sum0, i1 %pred, i32 %z) !prof !14 {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[Z_FR:%.*]] = freeze i32 [[Z:%.*]]
; CHECK-NEXT: [[I0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[V1:%.*]] = icmp eq i32 [[Z_FR]], 1
-; CHECK-NEXT: br i1 [[V1]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
+; CHECK-NEXT: [[V1_NOT:%.*]] = icmp eq i32 [[Z_FR]], 1
+; CHECK-NEXT: br i1 [[V1_NOT]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: entry.split.nonchr:
+; CHECK-NEXT: [[PRED_FR:%.*]] = freeze i1 [[PRED:%.*]]
; CHECK-NEXT: [[V0:%.*]] = icmp eq i32 [[Z_FR]], 0
-; CHECK-NEXT: [[V3_NONCHR:%.*]] = and i1 [[V0]], [[PRED:%.*]]
+; CHECK-NEXT: [[V3_NONCHR:%.*]] = and i1 [[V0]], [[PRED_FR]]
; CHECK-NEXT: br i1 [[V3_NONCHR]], label [[BB0_NONCHR:%.*]], label [[BB1]], !prof [[PROF16]]
; CHECK: bb0.nonchr:
; CHECK-NEXT: call void @foo()
@@ -1476,29 +1490,30 @@ define i32 @test_chr_16(ptr %i) !prof !14 {
; CHECK-LABEL: @test_chr_16(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
+; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb0:
; CHECK-NEXT: call void @foo()
-; CHECK-NEXT: [[V40:%.*]] = add i32 [[TMP0]], 44
-; CHECK-NEXT: [[V41:%.*]] = add i32 [[TMP0]], 99
+; CHECK-NEXT: [[V40:%.*]] = add i32 [[DOTFR1]], 44
+; CHECK-NEXT: [[V41:%.*]] = add i32 [[DOTFR1]], 99
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB3:%.*]]
; CHECK: entry.split.nonchr:
-; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 1
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb0.nonchr:
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB1_NONCHR]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[V40_NONCHR:%.*]] = add i32 [[TMP0]], 44
-; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 2
+; CHECK-NEXT: [[V40_NONCHR:%.*]] = add i32 [[DOTFR1]], 44
+; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 2
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
; CHECK-NEXT: br i1 [[TMP5]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb2.nonchr:
-; CHECK-NEXT: [[V41_NONCHR:%.*]] = add i32 [[TMP0]], 99
+; CHECK-NEXT: [[V41_NONCHR:%.*]] = add i32 [[DOTFR1]], 99
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
@@ -1915,15 +1930,18 @@ bb4:
define i32 @test_chr_21(i64 %i, i64 %k, i64 %j) !prof !14 {
; CHECK-LABEL: @test_chr_21(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP0:%.*]] = icmp ne i64 [[J:%.*]], [[K:%.*]]
-; CHECK-NEXT: [[CMP3:%.*]] = icmp ne i64 [[J]], [[I:%.*]]
-; CHECK-NEXT: [[CMP_I:%.*]] = icmp ne i64 [[I]], 86
-; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[CMP0]], i1 [[CMP3]], i1 false
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i1 [[CMP_I]], i1 false
+; CHECK-NEXT: [[J_FR:%.*]] = freeze i64 [[J:%.*]]
+; CHECK-NEXT: [[I_FR:%.*]] = freeze i64 [[I:%.*]]
+; CHECK-NEXT: [[K_FR:%.*]] = freeze i64 [[K:%.*]]
+; CHECK-NEXT: [[CMP0:%.*]] = icmp ne i64 [[J_FR]], [[K_FR]]
+; CHECK-NEXT: [[CMP3:%.*]] = icmp ne i64 [[I_FR]], [[J_FR]]
+; CHECK-NEXT: [[CMP_I:%.*]] = icmp ne i64 [[I_FR]], 86
+; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[CMP0]], [[CMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[TMP0]], [[CMP_I]]
; CHECK-NEXT: br i1 [[TMP1]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb1:
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i64 [[I]], 2
-; CHECK-NEXT: switch i64 [[I]], label [[BB2:%.*]] [
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i64 [[I_FR]], 2
+; CHECK-NEXT: switch i64 [[I_FR]], label [[BB2:%.*]] [
; CHECK-NEXT: i64 2, label [[BB3_NONCHR2:%.*]]
; CHECK-NEXT: i64 86, label [[BB2_NONCHR1:%.*]]
; CHECK-NEXT: ], !prof [[PROF19:![0-9]+]]
@@ -1946,13 +1964,13 @@ define i32 @test_chr_21(i64 %i, i64 %k, i64 %j) !prof !14 {
; CHECK: entry.split.nonchr:
; CHECK-NEXT: br i1 [[CMP0]], label [[BB1_NONCHR:%.*]], label [[BB10]], !prof [[PROF18]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[CMP2_NONCHR:%.*]] = icmp eq i64 [[I]], 2
+; CHECK-NEXT: [[CMP2_NONCHR:%.*]] = icmp eq i64 [[I_FR]], 2
; CHECK-NEXT: br i1 [[CMP2_NONCHR]], label [[BB3_NONCHR:%.*]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb3.nonchr:
-; CHECK-NEXT: [[CMP_I_NONCHR:%.*]] = icmp eq i64 [[I]], 86
+; CHECK-NEXT: [[CMP_I_NONCHR:%.*]] = icmp eq i64 [[I_FR]], 86
; CHECK-NEXT: br i1 [[CMP_I_NONCHR]], label [[BB6_NONCHR:%.*]], label [[BB4_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb6.nonchr:
-; CHECK-NEXT: [[CMP3_NONCHR:%.*]] = icmp eq i64 [[J]], [[I]]
+; CHECK-NEXT: [[CMP3_NONCHR:%.*]] = icmp eq i64 [[J_FR]], [[I_FR]]
; CHECK-NEXT: br i1 [[CMP3_NONCHR]], label [[BB8_NONCHR:%.*]], label [[BB7_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb8.nonchr:
; CHECK-NEXT: br i1 [[CMP_I_NONCHR]], label [[BB10]], label [[BB9_NONCHR:%.*]], !prof [[PROF16]]
@@ -2350,7 +2368,8 @@ bb0:
define i64 @test_chr_23(i64 %v0) !prof !14 {
; CHECK-LABEL: @test_chr_23(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[V0:%.*]], 50
+; CHECK-NEXT: [[V0_FR:%.*]] = freeze i64 [[V0:%.*]]
+; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[V0_FR]], 50
; CHECK-NEXT: [[V10_NOT:%.*]] = icmp eq i64 [[TMP0]], -50
; CHECK-NEXT: ret i64 99
;
@@ -2599,7 +2618,8 @@ define void @test_chr_with_bbs_address_taken2(ptr %i) !prof !14 {
; CHECK-LABEL: @test_chr_with_bbs_address_taken2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
+; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]]
; CHECK: bb0:
@@ -2607,14 +2627,14 @@ define void @test_chr_with_bbs_address_taken2(ptr %i) !prof !14 {
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB6:%.*]]
; CHECK: entry.split.nonchr:
-; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 1
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb0.nonchr:
; CHECK-NEXT: call void @foo()
; CHECK-NEXT: br label [[BB1_NONCHR]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 2
+; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 2
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
; CHECK-NEXT: br i1 [[TMP5]], label [[BB6]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]]
; CHECK: bb2.nonchr:
diff --git a/llvm/test/Transforms/PGOProfile/chr_coro.ll b/llvm/test/Transforms/PGOProfile/chr_coro.ll
index 233948fa4a8fb..12654eccd5689 100644
--- a/llvm/test/Transforms/PGOProfile/chr_coro.ll
+++ b/llvm/test/Transforms/PGOProfile/chr_coro.ll
@@ -36,26 +36,38 @@ define ptr @test_chr_with_coro_id(ptr %i) !prof !14 {
; CHECK-LABEL: @test_chr_with_coro_id(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
+; CHECK-NEXT: [[DOTFR1:%.*]] = freeze i32 [[TMP0]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[DOTFR1]], 3
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
-; CHECK-NEXT: br i1 [[TMP2]], label %[[BB0:.*]], label %[[ENTRY_SPLIT_NONCHR:.*]], !prof !15
-; CHECK: [[BB0]]:
+; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15:![0-9]+]]
+; CHECK: bb0:
; CHECK-NEXT: call void @foo()
-; CHECK-NEXT: br label %[[BB_CORO_ID:.*]]
+; CHECK-NEXT: br label [[BB_CORO_ID:%.*]]
+; CHECK: entry.split.nonchr:
+; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[DOTFR1]], 1
+; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP3]], 0
+; CHECK-NEXT: br i1 [[DOTNOT]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof [[PROF16:![0-9]+]]
+; CHECK: bb0.nonchr:
+; CHECK-NEXT: call void @foo()
+; CHECK-NEXT: br label [[BB1_NONCHR]]
; CHECK: bb1.nonchr:
-; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 2
+; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[DOTFR1]], 2
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
-; CHECK-NEXT: br i1 [[TMP5]], label %[[BB2_NONCHR:.*]], label %[[BB_CORO_ID]], !prof !16
-; CHECK: [[BB2_NONCHR]]:
+; CHECK-NEXT: br i1 [[TMP5]], label [[BB2_NONCHR:%.*]], label [[BB_CORO_ID]], !prof [[PROF16]]
+; CHECK: bb2.nonchr:
; CHECK-NEXT: call void @foo()
-; CHECK-NEXT: br label %[[BB_CORO_ID]]
-; CHECK: [[BB_CORO_ID]]:
-; CHECK-NEXT: [[ID:%.*]] = call token @llvm.coro.id
+; CHECK-NEXT: br label [[BB_CORO_ID]]
+; CHECK: bb.coro.id:
+; CHECK-NEXT: [[ID:%.*]] = call token @llvm.coro.id(i32 0, ptr null, ptr null, ptr nonnull @f.resumers)
; CHECK-NEXT: [[NEED_DYN_ALLOC:%.*]] = call i1 @llvm.coro.alloc(token [[ID]])
-; CHECK-NEXT: br i1 [[NEED_DYN_ALLOC]], label %[[BB_CORO_DYN_ALLOC:.*]], label %[[BB_CORO_BEGIN:.*]]
-; CHECK: [[BB_CORO_BEGIN]]:
-; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ null, %[[BB_CORO_ID]] ], [ %alloc, %[[BB_CORO_DYN_ALLOC]] ]
+; CHECK-NEXT: br i1 [[NEED_DYN_ALLOC]], label [[BB_CORO_DYN_ALLOC:%.*]], label [[BB_CORO_BEGIN:%.*]]
+; CHECK: bb.coro.dyn.alloc:
+; CHECK-NEXT: [[ALLOC:%.*]] = call ptr @malloc(i32 24)
+; CHECK-NEXT: br label [[BB_CORO_BEGIN]]
+; CHECK: bb.coro.begin:
+; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ null, [[BB_CORO_ID]] ], [ [[ALLOC]], [[BB_CORO_DYN_ALLOC]] ]
; CHECK-NEXT: [[HDL:%.*]] = call noalias nonnull ptr @llvm.coro.begin(token [[ID]], ptr [[PHI]])
+; CHECK-NEXT: ret ptr [[HDL]]
;
entry:
%0 = load i32, ptr %i
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