[PATCH] D145471: [RISCV] Set how many bytes load from or store to stack slot

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/test/CodeGen/RISCV/stack-slot-coloring.mir:1
+# RUN: llc -march=riscv32 -run-pass=greedy,virtregrewriter,stack-slot-coloring %s -o - 2>&1 | FileCheck %s
+
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Can we update_mir_test_checks.py this, precommit and see the diff in this patch?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145471/new/

https://reviews.llvm.org/D145471