[PATCH] D145471: [RISCV] Set how many bytes load from or store to stack slot

[Jim Lin via Phabricator via llvm-commits]

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Refer from: https://reviews.llvm.org/D44782

After https://reviews.llvm.org/D130302, LW+SEXT.B can be folded into LB
as partially reload stack slot. This gains incorrect optimization result
from `StackSlotColoring` without given the number of bytes exactly load
from stack. LB+SW are mis-interpreted as fully reload/restore from stack
slot without the sign-extension. SW would be considered as a redundant store.

The testcase is copied from llvm/test/CodeGen/X86/pr30821.mir.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145471

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.h
  llvm/test/CodeGen/RISCV/stack-slot-coloring.mir

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