[PATCH] D143225: [SROA] Create additional vector type candidates based on store and load slices

Mon Mar 6 16:30:08 PST 2023

MatzeB accepted this revision.
MatzeB added a comment.
This revision is now accepted and ready to land.

There is a curious change in types for `test_memset`, `test_array_vector` and `test_array_vector2`.

This appears to stem from the code added in https://github.com/llvm/llvm-project/commit/529eafd9beff233ba8debfc73e0b5c04cac36835 which I don't fully understand the intention right now. @lebedev.ri do you think it is good (or at least not bad) to use 8 x i16 in those tests?

Either way this seems outside the scope of this diff to discuss as it is pre-existing code. The change LGTM.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143225/new/

https://reviews.llvm.org/D143225