[PATCH] D143422: [LV] Update logic for calculating register usage due to invariants

[Paul Kirth via Phabricator via llvm-commits]

paulkirth added inline comments.


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Comment at: llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll:20-21
+; CHECK-NEXT: LV(REG): Found invariant usage: 2 item
+; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 2 registers
+; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 8 registers
+
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I think this test fails when building w/ `-LLVM_REVERSE_ITERATION=On`. Would you mind addressing this?

For context, I was testing something else and ran into this failure. I bisected to this commit w/ reverse iteration enabled.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D143422/new/

https://reviews.llvm.org/D143422