[PATCH] D145171: [FSAFDO] Improve FS discriminator encoding

[Rong Xu via Phabricator via llvm-commits]

xur added inline comments.


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Comment at: llvm/test/CodeGen/X86/fsafdo_test1.ll:5
 ; Check that fs-afdo discriminators are generated.
 ; CHECK: .loc    1 7 3 is_stmt 0 discriminator 2 # foo.c:7:3
 ; ChECK: .loc    1 9 5 is_stmt 1 discriminator 2 # foo.c:9:5
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hoy wrote:
> I have a question about keeping the original discriminator, i.e, 2 here. IIUC, the MIR sample loader will skip loading samples for the instruction. Do you think it should get a new discriminator so that it can use pass specific counters too? Let me know if I miss anything.
No. It will be loaded in MIR samples profile. 2 will be bit masked and the counter will be contributed to version 0 (i.e. discriminator value of 0).


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  https://reviews.llvm.org/D145171/new/

https://reviews.llvm.org/D145171