[PATCH] D145396: [AMDGPU] Fix AddedComplexity for s_buffer_load patterns. NFCI.
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 6 08:56:13 PST 2023
foad created this revision.
foad added reviewers: AMDGPU, arsenm, kosarev.
Herald added subscribers: StephenFan, kerbowa, hiraditya, tpr, dstuttard, yaxunl, jvesely, kzhuravl.
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foad requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
We set AddedComplexity = 100 for s_load patterns to prefer them over
global loads, but for s_buffer_load patterns there is no need to do
this and it was quietly overriding the AddedComplexity of each
individual GCNPat that is defined inside SMLoad_Pattern (but in practice
that did not appear to make any difference).
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D145396
Files:
llvm/lib/Target/AMDGPU/SMInstructions.td
Index: llvm/lib/Target/AMDGPU/SMInstructions.td
===================================================================
--- llvm/lib/Target/AMDGPU/SMInstructions.td
+++ llvm/lib/Target/AMDGPU/SMInstructions.td
@@ -831,38 +831,42 @@
def SMRDBufferSgprImm : ComplexPattern<iPTR, 2, "SelectSMRDBufferSgprImm">;
multiclass SMRD_Pattern <string Instr, ValueType vt> {
-
- // 1. IMM offset
- def : GCNPat <
- (smrd_load (SMRDImm i64:$sbase, i32:$offset)),
- (vt (!cast<SM_Pseudo>(Instr#"_IMM") $sbase, $offset, 0))
- >;
-
- // 2. 32-bit IMM offset on CI
- def : GCNPat <
- (smrd_load (SMRDImm32 i64:$sbase, i32:$offset)),
- (vt (!cast<InstSI>(Instr#"_IMM_ci") $sbase, $offset, 0))> {
- let OtherPredicates = [isGFX7Only];
- }
-
- // 3. SGPR offset
- def : GCNPat <
- (smrd_load (SMRDSgpr i64:$sbase, i32:$soffset)),
- (vt (!cast<SM_Pseudo>(Instr#"_SGPR") $sbase, $soffset, 0))
- >;
-
- // 4. SGPR+IMM offset
- def : GCNPat <
- (smrd_load (SMRDSgprImm i64:$sbase, i32:$soffset, i32:$offset)),
- (vt (!cast<SM_Pseudo>(Instr#"_SGPR_IMM") $sbase, $soffset, $offset, 0))> {
- let OtherPredicates = [isGFX9Plus];
- }
-
- // 5. No offset
- def : GCNPat <
- (vt (smrd_load (i64 SReg_64:$sbase))),
- (vt (!cast<SM_Pseudo>(Instr#"_IMM") i64:$sbase, 0, 0))
- >;
+ // Global and constant loads can be selected to either MUBUF or SMRD
+ // instructions, but SMRD instructions are faster so we want the instruction
+ // selector to prefer those.
+ let AddedComplexity = 100 in {
+ // 1. IMM offset
+ def : GCNPat <
+ (smrd_load (SMRDImm i64:$sbase, i32:$offset)),
+ (vt (!cast<SM_Pseudo>(Instr#"_IMM") $sbase, $offset, 0))
+ >;
+
+ // 2. 32-bit IMM offset on CI
+ def : GCNPat <
+ (smrd_load (SMRDImm32 i64:$sbase, i32:$offset)),
+ (vt (!cast<InstSI>(Instr#"_IMM_ci") $sbase, $offset, 0))> {
+ let OtherPredicates = [isGFX7Only];
+ }
+
+ // 3. SGPR offset
+ def : GCNPat <
+ (smrd_load (SMRDSgpr i64:$sbase, i32:$soffset)),
+ (vt (!cast<SM_Pseudo>(Instr#"_SGPR") $sbase, $soffset, 0))
+ >;
+
+ // 4. SGPR+IMM offset
+ def : GCNPat <
+ (smrd_load (SMRDSgprImm i64:$sbase, i32:$soffset, i32:$offset)),
+ (vt (!cast<SM_Pseudo>(Instr#"_SGPR_IMM") $sbase, $soffset, $offset, 0))> {
+ let OtherPredicates = [isGFX9Plus];
+ }
+
+ // 5. No offset
+ def : GCNPat <
+ (vt (smrd_load (i64 SReg_64:$sbase))),
+ (vt (!cast<SM_Pseudo>(Instr#"_IMM") i64:$sbase, 0, 0))
+ >;
+ } // End let AddedComplexity = 100
}
multiclass SMLoad_Pattern <string Instr, ValueType vt> {
@@ -898,11 +902,6 @@
}
}
-// Global and constant loads can be selected to either MUBUF or SMRD
-// instructions, but SMRD instructions are faster so we want the instruction
-// selector to prefer those.
-let AddedComplexity = 100 in {
-
foreach vt = Reg32Types.types in {
defm : SMRD_Pattern <"S_LOAD_DWORD", vt>;
}
@@ -934,7 +933,6 @@
defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX4", v4f32>;
defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX8", v8f32>;
defm : SMLoad_Pattern <"S_BUFFER_LOAD_DWORDX16", v16f32>;
-} // End let AddedComplexity = 100
let OtherPredicates = [HasSMemTimeInst] in {
def : GCNPat <
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