[PATCH] D141247: [GlobalISelEmitter][WIP] handle operand without MVT/class
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 6 04:46:44 PST 2023
arsenm added a subscriber: jrbyrnes.
arsenm added a comment.
Can you add a tablegen test for this?
================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll:673
; GFX8-NEXT: v_div_fixup_f16 v1, v3, v4, v6
-; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
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This is an improvement
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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll:1283
+; GFX8-NEXT: v_rcp_f16_e32 v1, v0
+; GFX8-NEXT: v_rcp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1
+; GFX8-NEXT: v_or_b32_e32 v0, v1, v0
----------------
Improvement
================
Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll:34
; GFX10GISEL: ; %bb.0: ; %main_body
-; GFX10GISEL-NEXT: v_perm_b32 v4, v5, v4, 0x5040100
+; GFX10GISEL-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX10GISEL-NEXT: v_lshl_or_b32 v4, v5, 16, v4
----------------
This is a regression cc @jrbyrnes
================
Comment at: llvm/utils/TableGen/GlobalISelEmitter.cpp:4594-4595
+
+ // Handle the case where the MVT/register class is omitted in the dest pattern
+ // but MVT exists in the source pattern.
+ if (isa<UnsetInit>(DstChild->getLeafValue())) {
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Where is the type check performed?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D141247/new/
https://reviews.llvm.org/D141247
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