[PATCH] D145159: [AMDGPU] Match med3 for (max (min ..))

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/saddsat.ll:27
+; GFX8-NEXT:    v_mov_b32_e32 v1, 0x7f
+; GFX8-NEXT:    v_med3_i32 v0, v0, s4, v1
 ; GFX8-NEXT:    s_setpc_b64 s[30:31]
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Pierre-vh wrote:
> arsenm wrote:
> > foad wrote:
> > > Pierre-vh wrote:
> > > > Another example, this time it's 2 more instructions so it's a bit worse even.
> > > The extra one is because you're using v_med3_i32 for a 16-bit operation. v_med3_i16 was introduced in gfx9.
> > This should have been filtered out by the hasMed3_16 check
> Should we just not do the combine if med3_16 is not available, instead of using the 32-bit version then?
Yes, because you'll always have to materialize the constants and extend the value. The 32-bit version might be better in cases where the inputs have repeated med3 uses but that seems unlikely 


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  https://reviews.llvm.org/D145159/new/

https://reviews.llvm.org/D145159