[PATCH] D144958: [SLP]Initial support for reshuffling of non-starting buildvector/gather nodes.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:9418
+      unsigned VF2 = cast<FixedVectorType>(V2->getType())->getNumElements();
+      unsigned VF = VF1;
+      if (VF1 != VF2) {
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unsigned VF = std::max(VF1, VF2);


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Comment at: llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:9420
+      if (VF1 != VF2) {
+        VF = std::max(VF1, VF2);
         SmallVector<int> ExtMask(VF, UndefMaskElem);
----------------
Drop this?


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Comment at: llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:9507
+        GatherShuffle =
+            isGatherShuffledEntry(E, GatheredScalars, Mask, Entries);
+      if (GatherShuffle) {
----------------
Use braces here as the multi-line if() is difficult to keep track of


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Comment at: llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:9564
+          Vec1 = PoisonValue::get(
+              FixedVectorType::get(ScalarTy, GatheredScalars.size()));
       }
----------------
Should we have done this already as another patch? A lot of the test changes seem related to this.


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Comment at: llvm/test/Transforms/SLPVectorizer/X86/PR35865-inseltpoison.ll:7
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[TMP0:%.*]] = extractelement <16 x half> undef, i32 4
-; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <16 x half> undef, i32 5
-; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <2 x half> poison, half [[TMP0]], i32 0
-; CHECK-NEXT:    [[TMP3:%.*]] = insertelement <2 x half> [[TMP2]], half [[TMP1]], i32 1
-; CHECK-NEXT:    [[TMP4:%.*]] = fpext <2 x half> [[TMP3]] to <2 x float>
-; CHECK-NEXT:    [[TMP5:%.*]] = bitcast <2 x float> [[TMP4]] to <2 x i32>
-; CHECK-NEXT:    [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> poison, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
-; CHECK-NEXT:    [[VECINS_I_5_I1:%.*]] = shufflevector <8 x i32> [[TMP6]], <8 x i32> poison, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef>
 ; CHECK-NEXT:    ret void
 ;
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Update the test IR to match PR35865.ll (just with poison instead of undef)


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D144958/new/

https://reviews.llvm.org/D144958