[PATCH] D145205: [codegen][riscv] Emit CFI directives when using shadow call stack

[Paul Kirth via Phabricator via llvm-commits]

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Currently we don't emit any CFI instructions for the SCS register when
enabling SCS on RISCV. This causes problems when unwinding, since the
SCS register isn't being handled properly.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145205

Files:
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/test/CodeGen/RISCV/shadowcallstack.ll

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