[llvm] 51b2f21 - [ASAN] Simplify masked load/store test [nfc]

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 2 14:06:25 PST 2023


Author: Philip Reames
Date: 2023-03-02T14:06:16-08:00
New Revision: 51b2f214dfa48e8583f57b3642bfb35c2ffb4027

URL: https://github.com/llvm/llvm-project/commit/51b2f214dfa48e8583f57b3642bfb35c2ffb4027
DIFF: https://github.com/llvm/llvm-project/commit/51b2f214dfa48e8583f57b3642bfb35c2ffb4027.diff

LOG: [ASAN] Simplify masked load/store test [nfc]

Only use of the globals was to load a pointer, we can just pass in a pointer instead.

Added: 
    

Modified: 
    llvm/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll b/llvm/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll
index c6c5c36ac62b..1caf85bf9472 100644
--- a/llvm/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll
+++ b/llvm/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll
@@ -10,18 +10,13 @@
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
- at v4f32 = global ptr zeroinitializer, align 8
- at v8i32 = global ptr zeroinitializer, align 8
- at v4i64 = global ptr zeroinitializer, align 8
-
 ;;;;;;;;;;;;;;;; STORE
 declare void @llvm.masked.store.v4f32.p0(<4 x float>, ptr, i32, <4 x i1>) argmemonly nounwind
 declare void @llvm.masked.store.v8i32.p0(<8 x i32>, ptr, i32, <8 x i1>) argmemonly nounwind
 declare void @llvm.masked.store.v4p0.p0(<4 x ptr>, ptr, i32, <4 x i1>) argmemonly nounwind
 
-define void @store.v4f32.1110(<4 x float> %arg) sanitize_address {
+define void @store.v4f32.1110(ptr %p, <4 x float> %arg) sanitize_address {
 ; ALL-LABEL: @store.v4f32.1110
-  %p = load ptr, ptr @v4f32, align 8
 ; NOSTORE-NOT: call void @__asan_store
 ; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, ptr %p, i64 0, i64 0
 ; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint ptr [[GEP0]] to i64
@@ -37,9 +32,8 @@ define void @store.v4f32.1110(<4 x float> %arg) sanitize_address {
   ret void
 }
 
-define void @store.v8i32.10010110(<8 x i32> %arg) sanitize_address {
+define void @store.v8i32.10010110(ptr %p, <8 x i32> %arg) sanitize_address {
 ; ALL-LABEL: @store.v8i32.10010110
-  %p = load ptr, ptr @v8i32, align 8
 ; NOSTORE-NOT: call void @__asan_store
 ; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, ptr %p, i64 0, i64 0
 ; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint ptr [[GEP0]] to i64
@@ -58,9 +52,8 @@ define void @store.v8i32.10010110(<8 x i32> %arg) sanitize_address {
   ret void
 }
 
-define void @store.v4i64.0001(<4 x ptr> %arg) sanitize_address {
+define void @store.v4i64.0001(ptr %p, <4 x ptr> %arg) sanitize_address {
 ; ALL-LABEL: @store.v4i64.0001
-  %p = load ptr, ptr @v4i64, align 8
 ; NOSTORE-NOT: call void @__asan_store
 ; STORE: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x ptr>, ptr %p, i64 0, i64 3
 ; STORE: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint ptr [[GEP3]] to i64
@@ -70,9 +63,8 @@ define void @store.v4i64.0001(<4 x ptr> %arg) sanitize_address {
   ret void
 }
 
-define void @store.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address {
+define void @store.v4f32.variable(ptr %p, <4 x float> %arg, <4 x i1> %mask) sanitize_address {
 ; ALL-LABEL: @store.v4f32.variable
-  %p = load ptr, ptr @v4f32, align 8
 ; STORE: [[MASK0:%[0-9A-Za-z]+]] = extractelement <4 x i1> %mask, i64 0
 ; STORE: br i1 [[MASK0]], label %[[THEN0:[0-9A-Za-z]+]], label %[[AFTER0:[0-9A-Za-z]+]]
 ; STORE: [[THEN0]]:
@@ -115,9 +107,8 @@ define void @store.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_add
 }
 
 ;; Store using two masked.stores, which should instrument them both.
-define void @store.v4f32.1010.split(<4 x float> %arg) sanitize_address {
+define void @store.v4f32.1010.split(ptr %p, <4 x float> %arg) sanitize_address {
 ; BOTH-LABEL: @store.v4f32.1010.split
-  %p = load ptr, ptr @v4f32, align 8
 ; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, ptr %p, i64 0, i64 0
 ; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint ptr [[GEP0]] to i64
 ; STORE: call void @__asan_store4(i64 [[PGEP0]])
@@ -132,9 +123,8 @@ define void @store.v4f32.1010.split(<4 x float> %arg) sanitize_address {
 }
 
 ;; Store using a masked.store after a full store. Shouldn't instrument the second one.
-define void @store.v4f32.0010.after.full.store(<4 x float> %arg) sanitize_address {
+define void @store.v4f32.0010.after.full.store(ptr %p, <4 x float> %arg) sanitize_address {
 ; BOTH-LABEL: @store.v4f32.0010.after.full.store
-  %p = load ptr, ptr @v4f32, align 8
 ; STORE: [[PTRTOINT:%[0-9A-Za-z]+]] = ptrtoint ptr %p to i64
 ; STORE: call void @__asan_store16(i64 [[PTRTOINT]])
 ; STORE: store <4 x float> %arg, ptr %p
@@ -150,9 +140,8 @@ declare <4 x float> @llvm.masked.load.v4f32.p0(ptr, i32, <4 x i1>, <4 x float>)
 declare <8 x i32> @llvm.masked.load.v8i32.p0(ptr, i32, <8 x i1>, <8 x i32>) argmemonly nounwind
 declare <4 x ptr> @llvm.masked.load.v4p0.p0(ptr, i32, <4 x i1>, <4 x ptr>) argmemonly nounwind
 
-define <8 x i32> @load.v8i32.11100001(<8 x i32> %arg) sanitize_address {
+define <8 x i32> @load.v8i32.11100001(ptr %p, <8 x i32> %arg) sanitize_address {
 ; ALL-LABEL: @load.v8i32.11100001
-  %p = load ptr, ptr @v8i32, align 8
 ; NOLOAD-NOT: call void @__asan_load
 ; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, ptr %p, i64 0, i64 0
 ; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint ptr [[GEP0]] to i64
@@ -171,9 +160,8 @@ define <8 x i32> @load.v8i32.11100001(<8 x i32> %arg) sanitize_address {
   ret <8 x i32> %res
 }
 
-define <4 x float> @load.v4f32.1001(<4 x float> %arg) sanitize_address {
+define <4 x float> @load.v4f32.1001(ptr %p, <4 x float> %arg) sanitize_address {
 ; ALL-LABEL: @load.v4f32.1001
-  %p = load ptr, ptr @v4f32, align 8
 ; NOLOAD-NOT: call void @__asan_load
 ; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, ptr %p, i64 0, i64 0
 ; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint ptr [[GEP0]] to i64
@@ -186,9 +174,8 @@ define <4 x float> @load.v4f32.1001(<4 x float> %arg) sanitize_address {
   ret <4 x float> %res
 }
 
-define <4 x ptr> @load.v4i64.0001(<4 x ptr> %arg) sanitize_address {
+define <4 x ptr> @load.v4i64.0001(ptr %p, <4 x ptr> %arg) sanitize_address {
 ; ALL-LABEL: @load.v4i64.0001
-  %p = load ptr, ptr @v4i64, align 8
 ; NOLOAD-NOT: call void @__asan_load
 ; LOAD: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x ptr>, ptr %p, i64 0, i64 3
 ; LOAD: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint ptr [[GEP3]] to i64
@@ -198,9 +185,8 @@ define <4 x ptr> @load.v4i64.0001(<4 x ptr> %arg) sanitize_address {
   ret <4 x ptr> %res
 }
 
-define <4 x float> @load.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address {
+define <4 x float> @load.v4f32.variable(ptr %p, <4 x float> %arg, <4 x i1> %mask) sanitize_address {
 ; ALL-LABEL: @load.v4f32.variable
-  %p = load ptr, ptr @v4f32, align 8
 ; LOAD: [[MASK0:%[0-9A-Za-z]+]] = extractelement <4 x i1> %mask, i64 0
 ; LOAD: br i1 [[MASK0]], label %[[THEN0:[0-9A-Za-z]+]], label %[[AFTER0:[0-9A-Za-z]+]]
 ; LOAD: [[THEN0]]:
@@ -243,9 +229,8 @@ define <4 x float> @load.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) saniti
 }
 
 ;; Load using two masked.loads, which should instrument them both.
-define <4 x float> @load.v4f32.1001.split(<4 x float> %arg) sanitize_address {
+define <4 x float> @load.v4f32.1001.split(ptr %p, <4 x float> %arg) sanitize_address {
 ; BOTH-LABEL: @load.v4f32.1001
-  %p = load ptr, ptr @v4f32, align 8
 ; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, ptr %p, i64 0, i64 0
 ; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint ptr [[GEP0]] to i64
 ; LOAD: call void @__asan_load4(i64 [[PGEP0]])
@@ -260,9 +245,8 @@ define <4 x float> @load.v4f32.1001.split(<4 x float> %arg) sanitize_address {
 }
 
 ;; Load using a masked.load after a full load. Shouldn't instrument the second one.
-define <4 x float> @load.v4f32.1001.after.full.load(<4 x float> %arg) sanitize_address {
+define <4 x float> @load.v4f32.1001.after.full.load(ptr %p, <4 x float> %arg) sanitize_address {
 ; BOTH-LABEL: @load.v4f32.1001.after.full.load
-  %p = load ptr, ptr @v4f32, align 8
 ; LOAD: [[PTRTOINT:%[0-9A-Za-z]+]] = ptrtoint ptr %p to i64
 ; LOAD: call void @__asan_load16(i64 [[PTRTOINT]])
 ; LOAD: %res = load <4 x float>, ptr %p


        


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