[PATCH] D136862: [AArch64][SME2] Add CodeGen support for target("aarch64.svcount").
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 2 04:09:51 PST 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
sdesmalen marked 2 inline comments as done.
Closed by commit rG170e7a0ec2e6: [AArch64][SME2] Add CodeGen support for target("aarch64.svcount"). (authored by sdesmalen).
Changed prior to commit:
https://reviews.llvm.org/D136862?vs=501191&id=501826#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136862/new/
https://reviews.llvm.org/D136862
Files:
llvm/include/llvm/CodeGen/ValueTypes.h
llvm/include/llvm/CodeGen/ValueTypes.td
llvm/include/llvm/IR/Type.h
llvm/include/llvm/Support/MachineValueType.h
llvm/lib/Analysis/Loads.cpp
llvm/lib/CodeGen/CodeGenPrepare.cpp
llvm/lib/CodeGen/LowLevelType.cpp
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/ValueTypes.cpp
llvm/lib/IR/Type.cpp
llvm/lib/Support/LowLevelType.cpp
llvm/lib/Target/AArch64/AArch64CallingConvention.td
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64RegisterInfo.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
llvm/test/CodeGen/AArch64/sme-aarch64-svcount-O3.ll
llvm/test/CodeGen/AArch64/sme-aarch64-svcount.ll
llvm/utils/TableGen/CodeGenTarget.cpp
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D136862.501826.patch
Type: text/x-patch
Size: 28745 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230302/9f50e640/attachment.bin>
More information about the llvm-commits
mailing list