[PATCH] D145113: [DAGCombiner][AArch64] Constant fold ISD::VSCALE if VScaleMin==VScaleMax.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added a comment.

Did you also try to see if there is additional value doing this transform at the LLVM IR layer? (I don't know if that could unlock other optimisations since ConstantFolding kicks in earlier)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145113/new/

https://reviews.llvm.org/D145113