[PATCH] D145041: [RISCV] Add classes to define SchedWrite list
Wang Pengcheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 1 22:57:58 PST 2023
pcwang-thead updated this revision to Diff 501755.
pcwang-thead marked 2 inline comments as done.
pcwang-thead added a comment.
Remove changes by accident.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D145041/new/
https://reviews.llvm.org/D145041
Files:
llvm/lib/Target/RISCV/RISCVScheduleV.td
Index: llvm/lib/Target/RISCV/RISCVScheduleV.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVScheduleV.td
+++ llvm/lib/Target/RISCV/RISCVScheduleV.td
@@ -44,12 +44,29 @@
}
}
+// Define classes to define list containing all SchedWrites for each (name, LMUL)
+// pair for each LMUL in each of the SchedMxList variants above and name in
+// argument `names`. These classes can be used to construct a list of existing
+// definitions of writes corresponding to each (name, LMUL) pair, that are needed
+// by the ReadAdvance. For example:
+// ```
+// defm "" : LMULReadAdvance<"ReadVIALUX", 1,
+// LMULSchedWriteList<["WriteVIMovVX"]>.value>;
+// ```
+class LMULSchedWriteListImpl<list<string> names, list<string> MxList> {
+ list<SchedWrite> value = !foldl([]<SchedWrite>,
+ !foreach(name, names,
+ !foreach(mx, MxList, !cast<SchedWrite>(name # "_" # mx))),
+ all, writes, !listconcat(all, writes));
+}
+
multiclass LMULSchedWrites<string name> : LMULSchedWritesImpl<name, SchedMxList>;
multiclass LMULSchedReads<string name> : LMULSchedReadsImpl<name, SchedMxList>;
multiclass LMULWriteRes<string name, list<ProcResourceKind> resources>
: LMULWriteResImpl<name, SchedMxList, resources>;
multiclass LMULReadAdvance<string name, int val, list<SchedWrite> writes = []>
: LMULReadAdvanceImpl<name, SchedMxList, val, writes>;
+class LMULSchedWriteList<list<string> names> : LMULSchedWriteListImpl<names, SchedMxList>;
multiclass LMULSchedWritesW<string name> : LMULSchedWritesImpl<name, SchedMxListW>;
multiclass LMULSchedReadsW<string name> : LMULSchedReadsImpl<name, SchedMxListW>;
@@ -57,6 +74,7 @@
: LMULWriteResImpl<name, SchedMxListW, resources>;
multiclass LMULReadAdvanceW<string name, int val, list<SchedWrite> writes = []>
: LMULReadAdvanceImpl<name, SchedMxListW, val, writes>;
+class LMULSchedWriteListW<list<string> names> : LMULSchedWriteListImpl<names, SchedMxListW>;
multiclass LMULSchedWritesFW<string name> : LMULSchedWritesImpl<name, SchedMxListFW>;
multiclass LMULSchedReadsFW<string name> : LMULSchedReadsImpl<name, SchedMxListFW>;
@@ -64,10 +82,12 @@
: LMULWriteResImpl<name, SchedMxListFW, resources>;
multiclass LMULReadAdvanceFW<string name, int val, list<SchedWrite> writes = []>
: LMULReadAdvanceImpl<name, SchedMxListFW, val, writes>;
+class LMULSchedWriteListFW<list<string> names> : LMULSchedWriteListImpl<names, SchedMxListFW>;
multiclass LMULSchedWritesFWRed<string name> : LMULSchedWritesImpl<name, SchedMxListFWRed>;
multiclass LMULWriteResFWRed<string name, list<ProcResourceKind> resources>
: LMULWriteResImpl<name, SchedMxListFWRed, resources>;
+class LMULSchedWriteListFWRed<list<string> names> : LMULSchedWriteListImpl<names, SchedMxListFWRed>;
// 3.6 Vector Byte Length vlenb
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