[llvm] fa6aadd - [llvm] Prevent building for riscv32-unknown-fuchsia
Leonard Chan via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 1 11:43:12 PST 2023
Author: Leonard Chan
Date: 2023-03-01T19:42:56Z
New Revision: fa6aadd6cb680f366fed50030f6a667ff30c33c9
URL: https://github.com/llvm/llvm-project/commit/fa6aadd6cb680f366fed50030f6a667ff30c33c9
DIFF: https://github.com/llvm/llvm-project/commit/fa6aadd6cb680f366fed50030f6a667ff30c33c9.diff
LOG: [llvm] Prevent building for riscv32-unknown-fuchsia
Fuchsia is exclusively 64-bit so this throw an error when using this
triple.
Differential Revision: https://reviews.llvm.org/D144998
Added:
llvm/test/CodeGen/RISCV/rv32-fuchsia.ll
Modified:
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index 4b510df2bc5f..5fcb94c6c4fe 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -111,6 +111,9 @@ RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT,
// RISC-V supports the MachineOutliner.
setMachineOutliner(true);
setSupportsDefaultOutlining(true);
+
+ if (TT.isOSFuchsia() && !TT.isArch64Bit())
+ report_fatal_error("Fuchsia is only supported for 64-bit");
}
const RISCVSubtarget *
diff --git a/llvm/test/CodeGen/RISCV/rv32-fuchsia.ll b/llvm/test/CodeGen/RISCV/rv32-fuchsia.ll
new file mode 100644
index 000000000000..c628ec77256b
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rv32-fuchsia.ll
@@ -0,0 +1,6 @@
+; RUN: not --crash llc -mtriple=riscv32-unknown-fuchsia < %s 2>&1 | FileCheck %s
+
+; CHECK: LLVM ERROR: Fuchsia is only supported for 64-bit
+define void @nothing() nounwind {
+ ret void
+}
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