[PATCH] D145071: [clang][RISCV] Set HasLegalHalfType to true if zfh is enabled

Kito Cheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 1 09:10:58 PST 2023


kito-cheng added a comment.

I would say it should always set to true if I just read first paragraph, since we have softfloat for fp16.

But I think it should be what you proposed according the `UseExcessPrecision` implementation.

And maybe we need a clang test for that like `clang/test/CodeGen/X86/fexcess-precision.c`?

---

BTW, I've created a bug for AArch64 long times ago when I implement and testing zfh implementation on GCC, https://github.com/llvm/llvm-project/issues/42820 @SjoerdMeijer ARM guys might interested on that.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145071/new/

https://reviews.llvm.org/D145071



More information about the llvm-commits mailing list