[PATCH] D144012: [SPARC][MC] Fix encoding of backwards BPr branches

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp:45
   case Sparc::fixup_sparc_br16_2:
-    return (Value >> 2) & 0xc000;
+    return ((Value >> 2) & 0xc000) << 6;
 
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This doesn't make sense to me. Shouldn't it be `(Value >> 16) & 0x3`? The fixup tables are correctly specifying the 2 bits for BE and LE.


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Comment at: llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp:67
+    case Sparc::fixup_sparc_br16_2:
+      return ELF::R_SPARC_WDISP16;
     case Sparc::fixup_sparc_pc22:    return ELF::R_SPARC_PC22;
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Isn't this going to create two relocations rather than one? Really there should be a single fixup for the whole thing.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144012/new/

https://reviews.llvm.org/D144012