[llvm] 3b74224 - [ARM] Remove a redundant function fixupBTI
Jirui Wu via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 1 07:02:11 PST 2023
Author: Jirui Wu
Date: 2023-03-01T15:01:38Z
New Revision: 3b742242a53ed0c2a2e1b6bb2352cace43c22030
URL: https://github.com/llvm/llvm-project/commit/3b742242a53ed0c2a2e1b6bb2352cace43c22030
DIFF: https://github.com/llvm/llvm-project/commit/3b742242a53ed0c2a2e1b6bb2352cace43c22030.diff
LOG: [ARM] Remove a redundant function fixupBTI
Since the redundant BTI instructions emitted by jump tables are now
removed in the ARMBranchTargets pass, the fixupBTI function is not needed
in the ARMConstantIslandPass. Some related tests are removed as well.
The relevant patch that removes the redundant BTI instructions:
https://reviews.llvm.org/D144470
Differential Revision: https://reviews.llvm.org/D145048
Added:
Modified:
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Removed:
llvm/test/CodeGen/Thumb2/bti-const-island-multiple-jump-tables.mir
llvm/test/CodeGen/Thumb2/bti-const-island.mir
################################################################################
diff --git a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
index 0c910eb94c34..b4bb7fb295ed 100644
--- a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -277,8 +277,6 @@ namespace {
unsigned &DeadSize, bool &CanDeleteLEA,
bool &BaseRegKill);
bool optimizeThumb2JumpTables();
- void fixupBTI(unsigned JTI, MachineBasicBlock &OldBB,
- MachineBasicBlock &NewBB);
MachineBasicBlock *adjustJTTargetBlockForward(unsigned JTI,
MachineBasicBlock *BB,
MachineBasicBlock *JTBB);
@@ -2455,38 +2453,6 @@ bool ARMConstantIslands::reorderThumb2JumpTables() {
return MadeChange;
}
-void ARMConstantIslands::fixupBTI(unsigned JTI, MachineBasicBlock &OldBB,
- MachineBasicBlock &NewBB) {
- assert(isThumb2 && "BTI in Thumb1?");
-
- // Insert a BTI instruction into NewBB
- BuildMI(NewBB, NewBB.begin(), DebugLoc(), TII->get(ARM::t2BTI));
-
- // Update jump table reference counts.
- const MachineJumpTableInfo &MJTI = *MF->getJumpTableInfo();
- const MachineJumpTableEntry &JTE = MJTI.getJumpTables()[JTI];
- for (const MachineBasicBlock *MBB : JTE.MBBs) {
- if (MBB != &OldBB)
- continue;
- --BlockJumpTableRefCount[MBB];
- ++BlockJumpTableRefCount[&NewBB];
- }
-
- // If the old basic block reference count dropped to zero, remove
- // the BTI instruction at its beginning.
- if (BlockJumpTableRefCount[&OldBB] > 0)
- return;
-
- // Skip meta instructions
- auto BTIPos = llvm::find_if_not(OldBB.instrs(), [](const MachineInstr &MI) {
- return MI.isMetaInstruction();
- });
- assert(BTIPos->getOpcode() == ARM::t2BTI &&
- "BasicBlock is mentioned in a jump table but does start with BTI");
- if (BTIPos->getOpcode() == ARM::t2BTI)
- BTIPos->eraseFromParent();
-}
-
MachineBasicBlock *ARMConstantIslands::adjustJTTargetBlockForward(
unsigned JTI, MachineBasicBlock *BB, MachineBasicBlock *JTBB) {
// If the destination block is terminated by an unconditional branch,
@@ -2546,9 +2512,6 @@ MachineBasicBlock *ARMConstantIslands::adjustJTTargetBlockForward(
NewBB->addSuccessor(BB);
JTBB->replaceSuccessor(BB, NewBB);
- if (MF->getInfo<ARMFunctionInfo>()->branchTargetEnforcement())
- fixupBTI(JTI, *BB, *NewBB);
-
++NumJTInserted;
return NewBB;
}
diff --git a/llvm/test/CodeGen/Thumb2/bti-const-island-multiple-jump-tables.mir b/llvm/test/CodeGen/Thumb2/bti-const-island-multiple-jump-tables.mir
deleted file mode 100644
index 8298ed792a03..000000000000
--- a/llvm/test/CodeGen/Thumb2/bti-const-island-multiple-jump-tables.mir
+++ /dev/null
@@ -1,311 +0,0 @@
-# RUN: llc -verify-machineinstrs -run-pass arm-cp-islands %s -o - | FileCheck %s
---- |
- target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
- target triple = "thumbv8.1m.main-arm-unknown-eabi"
-
- ; Tests adjustments to jump tables, made by the ARM Constant Islands pass
- ; int g(int), h(int);
- ; void g0(int), g1(int), g2(int);
- ; void h0(int), h1(int), h2(int);
- ;
- ; void f(int x) {
- ; for (;;) {
- ; up:
- ; x = g(x);
- ; switch (x) {
- ; case 0:
- ; g0(x);
- ; break;
- ; case 1:
- ; g1(x);
- ; break;
- ; case 2:
- ; g2(x);
- ; break;
- ; case 3:
- ; break;
- ; case 4:
- ; for (;;) {
- ; x = h(x);
- ; switch (x) {
- ; case 0:
- ; h0(x);
- ; break;
- ; case 1:
- ; h1(x);
- ; break;
- ; case 2:
- ; h2(x);
- ; break;
- ; case 3:
- ; goto up;
- ; case 4:
- ; return;
- ; }
- ; }
- ; }
- ; }
- ; }
-
- define hidden void @f(i32 %x) local_unnamed_addr #0 {
- entry:
- br label %up
-
- up: ; preds = %up, %sw.bb, %sw.bb1, %sw.bb2, %up.backedge.loopexit, %entry
- %x.addr.1 = phi i32 [ %x, %entry ], [ %call, %up ], [ %call, %sw.bb2 ], [ %call, %sw.bb1 ], [ %call, %sw.bb ], [ %call5, %up.backedge.loopexit ]
- %call = tail call i32 @g(i32 %x.addr.1)
- switch i32 %call, label %up [
- i32 0, label %sw.bb
- i32 1, label %sw.bb1
- i32 2, label %sw.bb2
- i32 4, label %for.cond4.preheader
- ]
-
- for.cond4.preheader: ; preds = %up
- br label %for.cond4
-
- up.backedge.loopexit: ; preds = %for.cond4
- br label %up
-
- sw.bb: ; preds = %up
- tail call void @g0(i32 0)
- br label %up
-
- sw.bb1: ; preds = %up
- tail call void @g1(i32 1)
- br label %up
-
- sw.bb2: ; preds = %up
- tail call void @g2(i32 2)
- br label %up
-
- for.cond4: ; preds = %for.cond4, %sw.bb6, %sw.bb7, %sw.bb8, %for.cond4.preheader
- %x.addr.2 = phi i32 [ %call, %for.cond4.preheader ], [ %call5, %sw.bb8 ], [ %call5, %sw.bb7 ], [ %call5, %sw.bb6 ], [ %call5, %for.cond4 ]
- %call5 = tail call i32 @h(i32 %x.addr.2)
- switch i32 %call5, label %for.cond4 [
- i32 0, label %sw.bb6
- i32 1, label %sw.bb7
- i32 2, label %sw.bb8
- i32 3, label %up.backedge.loopexit
- i32 4, label %sw.bb10
- ]
-
- sw.bb6: ; preds = %for.cond4
- tail call void @h0(i32 0)
- br label %for.cond4
-
- sw.bb7: ; preds = %for.cond4
- tail call void @h1(i32 1)
- br label %for.cond4
-
- sw.bb8: ; preds = %for.cond4
- tail call void @h2(i32 2)
- br label %for.cond4
-
- sw.bb10: ; preds = %for.cond4
- ret void
- }
-
- declare dso_local i32 @g(i32)
-
- declare dso_local void @g0(i32)
-
- declare dso_local void @g1(i32)
-
- declare dso_local void @g2(i32)
-
- declare dso_local i32 @h(i32)
-
- declare dso_local void @h0(i32)
-
- declare dso_local void @h1(i32)
-
- declare dso_local void @h2(i32)
-
- attributes #0 = { nounwind "disable-tail-calls"="false" "frame-pointer"="none" "no-jump-tables"="false" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+fp-armv8d16sp,+fp16,+fullfp16,+hwdiv,+lob,+ras,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp" }
-
- !llvm.module.flags = !{!0}
-
- !0 = !{i32 8, !"branch-target-enforcement", i32 1}
-
-...
----
-name: f
-alignment: 4
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-failedISel: false
-tracksRegLiveness: true
-hasWinCFI: false
-registers: []
-liveins:
- - { reg: '$r0', virtual-reg: '' }
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 8
- offsetAdjustment: 0
- maxAlignment: 4
- adjustsStack: true
- hasCalls: true
- stackProtector: ''
- maxCallFrameSize: 0
- cvBytesOfCalleeSavedRegisters: 0
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- localFrameSize: 0
- savePoint: ''
- restorePoint: ''
-fixedStack: []
-stack:
- - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
- debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-callSites: []
-debugValueSubstitutions: []
-constants: []
-machineFunctionInfo: {}
-jumpTable:
- kind: inline
- entries:
- - id: 0
- blocks: [ '%bb.3', '%bb.4', '%bb.5', '%bb.1', '%bb.7' ]
- - id: 1
- blocks: [ '%bb.6', '%bb.9', '%bb.10', '%bb.1', '%bb.11' ]
-
-# %bb.4 and %bb.10 redirect to %bb1, the rest are just renumbered
-# CHECK-LABEL: jumpTable:
-# CHECK-NEXT: kind: inline
-# CHECK-NEXT: entries:
-# CHECK-NEXT: - id: 0
-# CHECK-NEXT: blocks: [ '%bb.6', '%bb.14', '%bb.5', '%bb.4', '%bb.7' ]
-# CHECK-NEXT: - id: 1
-# CHECK-NEXT: blocks: [ '%bb.11', '%bb.12', '%bb.13', '%bb.10', '%bb.15' ]
-
-# %bb.1 loses the BTI
-# CHECK-LABEL: bb.1.up (align 4):
-# CHECK-NOT: t2BTI
-# CHECK-LABEL: bb.2.up:
-
-# CHECK-LABEL: bb.4.up:
-# CHECK: t2BTI
-# CHECK: tB %bb.1
-
-# CHECK-LABEL: bb.10.for.cond4:
-# CHECK: t2BTI
-# CHECK: tB %bb.1
-body: |
- bb.0.entry:
- successors: %bb.1(0x80000000)
- liveins: $r0, $r4, $lr
-
- t2BTI
- frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
- frame-setup CFI_INSTRUCTION def_cfa_offset 8
- frame-setup CFI_INSTRUCTION offset $lr, -4
- frame-setup CFI_INSTRUCTION offset $r4, -8
- $r4 = tMOVr killed $r0, 14 /* CC::al */, $noreg
- t2B %bb.1, 14 /* CC::al */, $noreg
-
- bb.5.sw.bb2:
- successors: %bb.1(0x80000000)
- liveins: $r4
-
- t2BTI
- $r0, dead $cpsr = tMOVi8 2, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @g2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp
-
- bb.1.up (align 4):
- successors: %bb.1(0x20000000), %bb.2(0x60000000)
- liveins: $r4
-
- t2BTI
- $r0 = tMOVr killed $r4, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @g, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp, implicit-def $r0
- $r4 = tMOVr $r0, 14 /* CC::al */, $noreg
- tCMPi8 killed $r0, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr
- t2Bcc %bb.1, 8 /* CC::hi */, killed $cpsr
- bb.2.up:
- successors: %bb.3(0x15555555), %bb.4(0x15555555), %bb.5(0x15555555), %bb.1(0x2aaaaaab), %bb.7(0x15555555)
- liveins: $r4
-
- renamable $r0 = t2LEApcrelJT %jump-table.0, 14 /* CC::al */, $noreg
- renamable $r0 = t2ADDrs killed renamable $r0, renamable $r4, 18, 14 /* CC::al */, $noreg, $noreg
- t2BR_JT killed renamable $r0, renamable $r4, %jump-table.0
-
- bb.3.sw.bb:
- successors: %bb.1(0x80000000)
- liveins: $r4
-
- t2BTI
- $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @g0, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp
- t2B %bb.1, 14 /* CC::al */, $noreg
-
- bb.6.sw.bb6:
- successors: %bb.7(0x80000000)
- liveins: $r4
-
- t2BTI
- $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @h0, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp
-
- bb.7.for.cond4 (align 4):
- successors: %bb.7(0x3efbefc0), %bb.8(0x41041040)
- liveins: $r4
-
- t2BTI
- $r0 = tMOVr killed $r4, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @h, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp, implicit-def $r0
- $r4 = tMOVr $r0, 14 /* CC::al */, $noreg
- tCMPi8 killed $r0, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr
- t2Bcc %bb.7, 8 /* CC::hi */, killed $cpsr
-
- bb.8.for.cond4:
- successors: %bb.6(0x29555555), %bb.9(0x29555555), %bb.10(0x29555555), %bb.1(0x02000000), %bb.11(0x02000000)
- liveins: $r4
-
- renamable $r0 = t2LEApcrelJT %jump-table.1, 14 /* CC::al */, $noreg
- renamable $r0 = t2ADDrs killed renamable $r0, renamable $r4, 18, 14 /* CC::al */, $noreg, $noreg
- t2BR_JT killed renamable $r0, renamable $r4, %jump-table.1
-
- bb.9.sw.bb7:
- successors: %bb.7(0x80000000)
- liveins: $r4
-
- t2BTI
- $r0, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @h1, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp
- t2B %bb.7, 14 /* CC::al */, $noreg
-
- bb.10.sw.bb8:
- successors: %bb.7(0x80000000)
- liveins: $r4
-
- t2BTI
- $r0, dead $cpsr = tMOVi8 2, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @h2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp
- t2B %bb.7, 14 /* CC::al */, $noreg
-
- bb.4.sw.bb1:
- successors: %bb.1(0x80000000)
- liveins: $r4
-
- t2BTI
- $r0, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @g1, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit-def $sp
- t2B %bb.1, 14 /* CC::al */, $noreg
-
- bb.11.sw.bb10:
- t2BTI
- frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc
-
-...
diff --git a/llvm/test/CodeGen/Thumb2/bti-const-island.mir b/llvm/test/CodeGen/Thumb2/bti-const-island.mir
deleted file mode 100644
index 3aa73895545b..000000000000
--- a/llvm/test/CodeGen/Thumb2/bti-const-island.mir
+++ /dev/null
@@ -1,168 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=thumbv7m-arm-none-eabi -run-pass=arm-cp-islands %s -o - | FileCheck %s
-
-# This test checks that the ARM Constant Island pass correctly handles BTI
-# instructions when adding new BBs to jump tables.
-#
-# Specifically the pass will replace bb.1.bb42.i in the jump table with a new
-# BB which will contain an unconditional branch to bb.1.bb42.i.
-# We expect that a BTI instruction will be added to the new BB and removed from
-# bb.1.bb42.i.
-
---- |
- declare noalias ptr @calloc(i32, i32)
-
- define internal i32 @test(i32 %argc, ptr nocapture %argv) {
- entry:
- br label %bb42.i
-
- bb5.i:
- %0 = or i32 %argc, 32
- br label %bb42.i
-
- bb35.i:
- %1 = call noalias ptr @calloc(i32 20, i32 1)
- unreachable
-
- bb37.i:
- %2 = call noalias ptr @calloc(i32 14, i32 1)
- unreachable
-
- bb39.i:
- %3 = call noalias ptr @calloc(i32 17, i32 1)
- unreachable
-
- bb42.i:
- switch i32 %argc, label %bb39.i [
- i32 70, label %bb35.i
- i32 77, label %bb37.i
- i32 100, label %bb5.i
- i32 101, label %bb42.i
- i32 116, label %bb42.i
- ]
- }
-
- !llvm.module.flags = !{!0}
- !0 = !{i32 8, !"branch-target-enforcement", i32 1}
-
-...
----
-name: test
-alignment: 4
-tracksRegLiveness: true
-liveins:
- - { reg: '$r0' }
-frameInfo:
- stackSize: 8
- maxAlignment: 4
- adjustsStack: true
- hasCalls: true
- maxCallFrameSize: 0
-stack:
- - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '$lr' }
- - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, callee-saved-register: '$r7' }
-machineFunctionInfo: {}
-jumpTable:
- kind: inline
- entries:
- - id: 0
- blocks: [ '%bb.3', '%bb.5', '%bb.5', '%bb.5', '%bb.5', '%bb.5',
- '%bb.5', '%bb.4', '%bb.5', '%bb.5', '%bb.5', '%bb.5',
- '%bb.5', '%bb.5', '%bb.5', '%bb.5', '%bb.5', '%bb.5',
- '%bb.5', '%bb.5', '%bb.5', '%bb.5', '%bb.5', '%bb.5',
- '%bb.5', '%bb.5', '%bb.5', '%bb.5', '%bb.5', '%bb.5',
- '%bb.1', '%bb.1', '%bb.5', '%bb.5', '%bb.5', '%bb.5',
- '%bb.5', '%bb.5', '%bb.5', '%bb.5', '%bb.5', '%bb.5',
- '%bb.5', '%bb.5', '%bb.5', '%bb.5', '%bb.1' ]
-body: |
- ; CHECK-LABEL: name: test
- ; CHECK: bb.0.entry:
- ; CHECK: successors: %bb.1(0x80000000)
- ; CHECK: liveins: $r0, $r7, $lr
- ; CHECK: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp
- ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
- ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
- ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8
- ; CHECK: renamable $r0, dead $cpsr = tSUBi8 killed renamable $r0, 70, 14 /* CC::al */, $noreg
- ; CHECK: bb.1.bb42.i (align 4):
- ; CHECK: successors: %bb.6(0x40000000), %bb.2(0x40000000)
- ; CHECK: liveins: $r0
- ; CHECK: tCMPi8 renamable $r0, 46, 14 /* CC::al */, $noreg, implicit-def $cpsr
- ; CHECK: tBcc %bb.6, 8 /* CC::hi */, killed $cpsr
- ; CHECK: bb.2.bb42.i:
- ; CHECK: successors: %bb.5(0x20000000), %bb.6(0x20000000), %bb.7(0x20000000), %bb.4(0x20000000)
- ; CHECK: liveins: $r0
- ; CHECK: t2TBB_JT $pc, $r0, %jump-table.0, 0
- ; CHECK: bb.3:
- ; CHECK: successors:
- ; CHECK: JUMPTABLE_TBB 0, %jump-table.0, 188
- ; CHECK: bb.4.bb42.i:
- ; CHECK: successors: %bb.1(0x80000000)
- ; CHECK: liveins: $r0
- ; CHECK: t2BTI
- ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
- ; CHECK: bb.5.bb35.i:
- ; CHECK: successors:
- ; CHECK: t2BTI
- ; CHECK: $r0, dead $cpsr = tMOVi8 20, 14 /* CC::al */, $noreg
- ; CHECK: $r1, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
- ; CHECK: tBL 14 /* CC::al */, $noreg, @calloc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit-def $sp, implicit-def dead $r0
- ; CHECK: bb.6.bb39.i:
- ; CHECK: successors:
- ; CHECK: t2BTI
- ; CHECK: $r0, dead $cpsr = tMOVi8 17, 14 /* CC::al */, $noreg
- ; CHECK: $r1, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
- ; CHECK: tBL 14 /* CC::al */, $noreg, @calloc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit-def $sp, implicit-def dead $r0
- ; CHECK: bb.7.bb37.i:
- ; CHECK: t2BTI
- ; CHECK: $r0, dead $cpsr = tMOVi8 14, 14 /* CC::al */, $noreg
- ; CHECK: $r1, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
- ; CHECK: tBL 14 /* CC::al */, $noreg, @calloc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit-def $sp, implicit-def dead $r0
- bb.0.entry:
- liveins: $r0, $r7, $lr
-
- frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp
- frame-setup CFI_INSTRUCTION def_cfa_offset 8
- frame-setup CFI_INSTRUCTION offset $lr, -4
- frame-setup CFI_INSTRUCTION offset $r7, -8
- renamable $r0, dead $cpsr = tSUBi8 killed renamable $r0, 70, 14 /* CC::al */, $noreg
-
- bb.1.bb42.i (align 4):
- successors: %bb.5, %bb.2
- liveins: $r0
-
- t2BTI
- tCMPi8 renamable $r0, 46, 14 /* CC::al */, $noreg, implicit-def $cpsr
- t2Bcc %bb.5, 8 /* CC::hi */, killed $cpsr
-
- bb.2.bb42.i:
- successors: %bb.3, %bb.5, %bb.4, %bb.1
- liveins: $r0
-
- renamable $r1 = t2LEApcrelJT %jump-table.0, 14 /* CC::al */, $noreg
- renamable $r1 = t2ADDrs killed renamable $r1, renamable $r0, 18, 14 /* CC::al */, $noreg, $noreg
- t2BR_JT killed renamable $r1, renamable $r0, %jump-table.0
-
- bb.3.bb35.i:
- successors:
-
- t2BTI
- $r0, dead $cpsr = tMOVi8 20, 14 /* CC::al */, $noreg
- $r1, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @calloc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit-def $sp, implicit-def dead $r0
-
- bb.5.bb39.i:
- successors:
-
- t2BTI
- $r0, dead $cpsr = tMOVi8 17, 14 /* CC::al */, $noreg
- $r1, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @calloc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit-def $sp, implicit-def dead $r0
-
- bb.4.bb37.i:
- t2BTI
- $r0, dead $cpsr = tMOVi8 14, 14 /* CC::al */, $noreg
- $r1, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
- tBL 14 /* CC::al */, $noreg, @calloc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit-def $sp, implicit-def dead $r0
-
-...
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