[llvm] b06e5ad - [AMDGPU][AsmParser][NFC] Simplify parsing cache policies.
Ivan Kosarev via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 1 04:34:34 PST 2023
Author: Ivan Kosarev
Date: 2023-03-01T12:34:21Z
New Revision: b06e5ad8a659c00448c2e295595bed9c8e2d0853
URL: https://github.com/llvm/llvm-project/commit/b06e5ad8a659c00448c2e295595bed9c8e2d0853
DIFF: https://github.com/llvm/llvm-project/commit/b06e5ad8a659c00448c2e295595bed9c8e2d0853.diff
LOG: [AMDGPU][AsmParser][NFC] Simplify parsing cache policies.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D144954
Added:
Modified:
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 70b186d28d89b..c9dc8aade7c7b 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -6027,28 +6027,21 @@ AMDGPUAsmParser::parseNamedBit(StringRef Name, OperandVector &Operands,
unsigned AMDGPUAsmParser::getCPolKind(StringRef Id, StringRef Mnemo,
bool &Disabling) const {
- Disabling = Id.startswith("no");
+ Disabling = Id.consume_front("no");
if (isGFX940() && !Mnemo.startswith("s_")) {
return StringSwitch<unsigned>(Id)
.Case("nt", AMDGPU::CPol::NT)
- .Case("nont", AMDGPU::CPol::NT)
.Case("sc0", AMDGPU::CPol::SC0)
- .Case("nosc0", AMDGPU::CPol::SC0)
.Case("sc1", AMDGPU::CPol::SC1)
- .Case("nosc1", AMDGPU::CPol::SC1)
.Default(0);
}
return StringSwitch<unsigned>(Id)
.Case("dlc", AMDGPU::CPol::DLC)
- .Case("nodlc", AMDGPU::CPol::DLC)
.Case("glc", AMDGPU::CPol::GLC)
- .Case("noglc", AMDGPU::CPol::GLC)
.Case("scc", AMDGPU::CPol::SCC)
- .Case("noscc", AMDGPU::CPol::SCC)
.Case("slc", AMDGPU::CPol::SLC)
- .Case("noslc", AMDGPU::CPol::SLC)
.Default(0);
}
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