[PATCH] D144550: [AArch64] Remove 64bit->128bit vector insert lowering

[Dave Green via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG18af85302200: [AArch64] Remove 64bit->128bit vector insert lowering (authored by dmgreen).

Changed prior to commit:
  https://reviews.llvm.org/D144550?vs=499397&id=501419#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144550/new/

https://reviews.llvm.org/D144550

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
  llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D144550.501419.patch
Type: text/x-patch
Size: 9844 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230301/2db9dab8/attachment.bin>