[llvm] a783015 - [AMDGPU] Replace LegacyDA with Uniformity Analysis in AnnotateUniformValues
Anshil Gandhi via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 28 12:05:53 PST 2023
Author: Anshil Gandhi
Date: 2023-02-28T13:05:38-07:00
New Revision: a78301560d8d921d1980de8a1e1820f678d109f1
URL: https://github.com/llvm/llvm-project/commit/a78301560d8d921d1980de8a1e1820f678d109f1
DIFF: https://github.com/llvm/llvm-project/commit/a78301560d8d921d1980de8a1e1820f678d109f1.diff
LOG: [AMDGPU] Replace LegacyDA with Uniformity Analysis in AnnotateUniformValues
Reviewed By: sameerds
Differential Revision: https://reviews.llvm.org/D144162
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
index 74be0336851cc..6a409f0dcbe77 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
@@ -16,8 +16,8 @@
#include "Utils/AMDGPUBaseInfo.h"
#include "Utils/AMDGPUMemoryUtils.h"
#include "llvm/Analysis/AliasAnalysis.h"
-#include "llvm/Analysis/LegacyDivergenceAnalysis.h"
#include "llvm/Analysis/MemorySSA.h"
+#include "llvm/Analysis/UniformityAnalysis.h"
#include "llvm/IR/InstVisitor.h"
#include "llvm/InitializePasses.h"
@@ -29,7 +29,7 @@ namespace {
class AMDGPUAnnotateUniformValues : public FunctionPass,
public InstVisitor<AMDGPUAnnotateUniformValues> {
- LegacyDivergenceAnalysis *DA;
+ UniformityInfo *UA;
MemorySSA *MSSA;
AliasAnalysis *AA;
bool isEntryFunc;
@@ -55,7 +55,7 @@ class AMDGPUAnnotateUniformValues : public FunctionPass,
return "AMDGPU Annotate Uniform Values";
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<LegacyDivergenceAnalysis>();
+ AU.addRequired<UniformityInfoWrapperPass>();
AU.addRequired<MemorySSAWrapperPass>();
AU.addRequired<AAResultsWrapperPass>();
AU.setPreservesAll();
@@ -69,7 +69,7 @@ class AMDGPUAnnotateUniformValues : public FunctionPass,
INITIALIZE_PASS_BEGIN(AMDGPUAnnotateUniformValues, DEBUG_TYPE,
"Add AMDGPU uniform metadata", false, false)
-INITIALIZE_PASS_DEPENDENCY(LegacyDivergenceAnalysis)
+INITIALIZE_PASS_DEPENDENCY(UniformityInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MemorySSAWrapperPass)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_END(AMDGPUAnnotateUniformValues, DEBUG_TYPE,
@@ -78,13 +78,13 @@ INITIALIZE_PASS_END(AMDGPUAnnotateUniformValues, DEBUG_TYPE,
char AMDGPUAnnotateUniformValues::ID = 0;
void AMDGPUAnnotateUniformValues::visitBranchInst(BranchInst &I) {
- if (DA->isUniform(&I))
+ if (UA->isUniform(&I))
setUniformMetadata(&I);
}
void AMDGPUAnnotateUniformValues::visitLoadInst(LoadInst &I) {
Value *Ptr = I.getPointerOperand();
- if (!DA->isUniform(Ptr))
+ if (!UA->isUniform(Ptr))
return;
Instruction *PtrI = dyn_cast<Instruction>(Ptr);
if (PtrI)
@@ -108,7 +108,7 @@ bool AMDGPUAnnotateUniformValues::runOnFunction(Function &F) {
if (skipFunction(F))
return false;
- DA = &getAnalysis<LegacyDivergenceAnalysis>();
+ UA = &getAnalysis<UniformityInfoWrapperPass>().getUniformityInfo();
MSSA = &getAnalysis<MemorySSAWrapperPass>().getMSSA();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
isEntryFunc = AMDGPU::isEntryFunctionCC(F.getCallingConv());
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index c90ec4332642a..30c6a66f8b5a3 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -79,13 +79,15 @@
; GCN-O0-NEXT: Detect single entry single exit regions
; GCN-O0-NEXT: Region Pass Manager
; GCN-O0-NEXT: Structurize control flow
-; GCN-O0-NEXT: Post-Dominator Tree Construction
-; GCN-O0-NEXT: Natural Loop Information
-; GCN-O0-NEXT: Legacy Divergence Analysis
+; GCN-O0-NEXT: Cycle Info Analysis
+; GCN-O0-NEXT: Uniformity Analysis
; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl)
; GCN-O0-NEXT: Function Alias Analysis Results
; GCN-O0-NEXT: Memory SSA
; GCN-O0-NEXT: AMDGPU Annotate Uniform Values
+; GCN-O0-NEXT: Natural Loop Information
+; GCN-O0-NEXT: Post-Dominator Tree Construction
+; GCN-O0-NEXT: Legacy Divergence Analysis
; GCN-O0-NEXT: SI annotate control flow
; GCN-O0-NEXT: Post-Dominator Tree Construction
; GCN-O0-NEXT: Legacy Divergence Analysis
@@ -273,13 +275,15 @@
; GCN-O1-NEXT: Detect single entry single exit regions
; GCN-O1-NEXT: Region Pass Manager
; GCN-O1-NEXT: Structurize control flow
-; GCN-O1-NEXT: Post-Dominator Tree Construction
-; GCN-O1-NEXT: Natural Loop Information
-; GCN-O1-NEXT: Legacy Divergence Analysis
+; GCN-O1-NEXT: Cycle Info Analysis
+; GCN-O1-NEXT: Uniformity Analysis
; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)
; GCN-O1-NEXT: Function Alias Analysis Results
; GCN-O1-NEXT: Memory SSA
; GCN-O1-NEXT: AMDGPU Annotate Uniform Values
+; GCN-O1-NEXT: Natural Loop Information
+; GCN-O1-NEXT: Post-Dominator Tree Construction
+; GCN-O1-NEXT: Legacy Divergence Analysis
; GCN-O1-NEXT: SI annotate control flow
; GCN-O1-NEXT: Post-Dominator Tree Construction
; GCN-O1-NEXT: Legacy Divergence Analysis
@@ -571,13 +575,15 @@
; GCN-O1-OPTS-NEXT: Detect single entry single exit regions
; GCN-O1-OPTS-NEXT: Region Pass Manager
; GCN-O1-OPTS-NEXT: Structurize control flow
-; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
-; GCN-O1-OPTS-NEXT: Natural Loop Information
-; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis
+; GCN-O1-OPTS-NEXT: Cycle Info Analysis
+; GCN-O1-OPTS-NEXT: Uniformity Analysis
; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)
; GCN-O1-OPTS-NEXT: Function Alias Analysis Results
; GCN-O1-OPTS-NEXT: Memory SSA
; GCN-O1-OPTS-NEXT: AMDGPU Annotate Uniform Values
+; GCN-O1-OPTS-NEXT: Natural Loop Information
+; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
+; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis
; GCN-O1-OPTS-NEXT: SI annotate control flow
; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis
@@ -877,13 +883,15 @@
; GCN-O2-NEXT: Detect single entry single exit regions
; GCN-O2-NEXT: Region Pass Manager
; GCN-O2-NEXT: Structurize control flow
-; GCN-O2-NEXT: Post-Dominator Tree Construction
-; GCN-O2-NEXT: Natural Loop Information
-; GCN-O2-NEXT: Legacy Divergence Analysis
+; GCN-O2-NEXT: Cycle Info Analysis
+; GCN-O2-NEXT: Uniformity Analysis
; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)
; GCN-O2-NEXT: Function Alias Analysis Results
; GCN-O2-NEXT: Memory SSA
; GCN-O2-NEXT: AMDGPU Annotate Uniform Values
+; GCN-O2-NEXT: Natural Loop Information
+; GCN-O2-NEXT: Post-Dominator Tree Construction
+; GCN-O2-NEXT: Legacy Divergence Analysis
; GCN-O2-NEXT: SI annotate control flow
; GCN-O2-NEXT: Post-Dominator Tree Construction
; GCN-O2-NEXT: Legacy Divergence Analysis
@@ -1196,13 +1204,15 @@
; GCN-O3-NEXT: Detect single entry single exit regions
; GCN-O3-NEXT: Region Pass Manager
; GCN-O3-NEXT: Structurize control flow
-; GCN-O3-NEXT: Post-Dominator Tree Construction
-; GCN-O3-NEXT: Natural Loop Information
-; GCN-O3-NEXT: Legacy Divergence Analysis
+; GCN-O3-NEXT: Cycle Info Analysis
+; GCN-O3-NEXT: Uniformity Analysis
; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)
; GCN-O3-NEXT: Function Alias Analysis Results
; GCN-O3-NEXT: Memory SSA
; GCN-O3-NEXT: AMDGPU Annotate Uniform Values
+; GCN-O3-NEXT: Natural Loop Information
+; GCN-O3-NEXT: Post-Dominator Tree Construction
+; GCN-O3-NEXT: Legacy Divergence Analysis
; GCN-O3-NEXT: SI annotate control flow
; GCN-O3-NEXT: Post-Dominator Tree Construction
; GCN-O3-NEXT: Legacy Divergence Analysis
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