[llvm] 27c3c6c - [RISCV] Use !listremove for LMUL lists in V scheduling info [nfc]

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2023-02-28T09:24:17-08:00
New Revision: 27c3c6c4b081d23dd1e59cb50742c3cab715970e

URL: https://github.com/llvm/llvm-project/commit/27c3c6c4b081d23dd1e59cb50742c3cab715970e
DIFF: https://github.com/llvm/llvm-project/commit/27c3c6c4b081d23dd1e59cb50742c3cab715970e.diff

LOG: [RISCV] Use !listremove for LMUL lists in V scheduling info [nfc]

Using listremove makes it easier to confirm that the code matches the comments.  The only in tree users of these lists are not order sensative.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVScheduleV.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVScheduleV.td b/llvm/lib/Target/RISCV/RISCVScheduleV.td
index 3d6e3470f058..5f01dabd2802 100644
--- a/llvm/lib/Target/RISCV/RISCVScheduleV.td
+++ b/llvm/lib/Target/RISCV/RISCVScheduleV.td
@@ -12,10 +12,10 @@
 defvar UpperBoundLMUL = "UpperBound";
 defvar SchedMxList = ["UpperBound", "M1", "M2", "M4", "M8", "MF2", "MF4", "MF8"];
 // Used for widening and narrowing instructions as it doesn't contain M8.
-defvar SchedMxListW = ["UpperBound", "MF8", "MF4", "MF2", "M1", "M2", "M4"];
-defvar SchedMxListFW = ["UpperBound", "MF4", "MF2", "M1", "M2", "M4"];
+defvar SchedMxListW = !listremove(SchedMxList, ["M8"]);
+defvar SchedMxListFW = !listremove(SchedMxList, ["M8", "MF8"]);
 // Used for widening floating-point Reduction as it doesn't contain MF8.
-defvar SchedMxListFWRed = ["UpperBound", "MF4", "MF2", "M1", "M2", "M4", "M8"];
+defvar SchedMxListFWRed = !listremove(SchedMxList, ["MF8"]);
 
 // Define multiclasses to define SchedWrite, SchedRead,  WriteRes, and
 // ReadAdvance for each (name, LMUL) pair for each LMUL in each of the