[llvm] 60f3703 - [RISCV] Factor out multiclass definitions for V scheduling info [nfc]

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2023-02-28T08:58:56-08:00
New Revision: 60f3703d1bc3c6178214786845eca653aa9fcac1

URL: https://github.com/llvm/llvm-project/commit/60f3703d1bc3c6178214786845eca653aa9fcac1
DIFF: https://github.com/llvm/llvm-project/commit/60f3703d1bc3c6178214786845eca653aa9fcac1.diff

LOG: [RISCV] Factor out multiclass definitions for V scheduling info [nfc]

Factoring out a shared multiclass imply makes it easier to see that all of these do the same thing, just on different lists. It also makes it easier to see differences - such as we don't define read related pieces for FWRed.

Differential Revision: https://reviews.llvm.org/D144899

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVScheduleV.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVScheduleV.td b/llvm/lib/Target/RISCV/RISCVScheduleV.td
index c7d63707f8854..3d6e3470f058d 100644
--- a/llvm/lib/Target/RISCV/RISCVScheduleV.td
+++ b/llvm/lib/Target/RISCV/RISCVScheduleV.td
@@ -17,110 +17,58 @@ defvar SchedMxListFW = ["UpperBound", "MF4", "MF2", "M1", "M2", "M4"];
 // Used for widening floating-point Reduction as it doesn't contain MF8.
 defvar SchedMxListFWRed = ["UpperBound", "MF4", "MF2", "M1", "M2", "M4", "M8"];
 
-// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxList
-multiclass LMULSchedWrites<string name> {
-  foreach mx = SchedMxList in {
-    def name # "_" # mx : SchedWrite;
-  }
-}
-
-// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxListW
-multiclass LMULSchedWritesW<string name> {
-  foreach mx = SchedMxListW in {
-    def name # "_" # mx : SchedWrite;
-  }
-}
-
-// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxListFW
-multiclass LMULSchedWritesFW<string name> {
-  foreach mx = SchedMxListFW in {
-    def name # "_" # mx : SchedWrite;
-  }
-}
+// Define multiclasses to define SchedWrite, SchedRead,  WriteRes, and
+// ReadAdvance for each (name, LMUL) pair for each LMUL in each of the
+// SchedMxList variants above.
 
-// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxListFWRed
-multiclass LMULSchedWritesFWRed<string name> {
-  foreach mx = SchedMxListFWRed in {
+multiclass LMULSchedWritesImpl<string name, list<string> MxList> {
+  foreach mx = MxList in {
     def name # "_" # mx : SchedWrite;
   }
 }
-
-// Creates SchedRead for each (name, LMUL) pair for LMUL in SchedMxList
-multiclass LMULSchedReads<string name> {
-  foreach mx = SchedMxList in {
-    def name # "_" # mx : SchedRead;
-  }
-}
-
-// Creates SchedRead for each (name, LMUL) pair for LMUL in SchedMxListW
-multiclass LMULSchedReadsW<string name> {
-  foreach mx = SchedMxListW in {
-    def name # "_" # mx : SchedRead;
-  }
-}
-
-// Creates SchedRead for each (name, LMUL) pair for LMUL in SchedMxListFW
-multiclass LMULSchedReadsFW<string name> {
-  foreach mx = SchedMxListFW in {
+multiclass LMULSchedReadsImpl<string name, list<string> MxList> {
+  foreach mx = MxList in {
     def name # "_" # mx : SchedRead;
   }
 }
-
-// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
-// in SchedMxList
-multiclass LMULWriteRes<string name, list<ProcResourceKind> resources> {
-  foreach mx = SchedMxList in {
-    def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
-  }
-}
-
-// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
-// in SchedMxListW
-multiclass LMULWriteResW<string name, list<ProcResourceKind> resources> {
-  foreach mx = SchedMxListW in {
-    def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
-  }
-}
-
-// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
-// in SchedMxListFW
-multiclass LMULWriteResFW<string name, list<ProcResourceKind> resources> {
-  foreach mx = SchedMxListFW in {
-    def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
-  }
-}
-
-// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
-// in SchedMxListFWRed
-multiclass LMULWriteResFWRed<string name, list<ProcResourceKind> resources> {
-  foreach mx = SchedMxListFWRed in {
+multiclass LMULWriteResImpl<string name, list<string> MxList,
+                            list<ProcResourceKind> resources> {
+  foreach mx = MxList in {
     def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
   }
 }
-
-// Creates ReadAdvance for each (name, LMUL, val) tuple for LMUL
-// in SchedMxList
-multiclass LMULReadAdvance<string name, int val, list<SchedWrite> writes = []> {
-  foreach mx = SchedMxList in {
+multiclass LMULReadAdvanceImpl<string name, list<string> MxList, int val,
+                               list<SchedWrite> writes = []> {
+  foreach mx = MxList in {
     def : ReadAdvance<!cast<SchedRead>(name # "_" # mx), val, writes>;
   }
 }
 
-// Creates ReadAdvance for each (name, LMUL, val) tuple for LMUL
-// in SchedMxListW
-multiclass LMULReadAdvanceW<string name, int val, list<SchedWrite> writes = []> {
-  foreach mx = SchedMxListW in {
-    def : ReadAdvance<!cast<SchedRead>(name # "_" # mx), val, writes>;
-  }
-}
+multiclass LMULSchedWrites<string name> : LMULSchedWritesImpl<name, SchedMxList>;
+multiclass LMULSchedReads<string name> : LMULSchedReadsImpl<name, SchedMxList>;
+multiclass LMULWriteRes<string name, list<ProcResourceKind> resources>
+  : LMULWriteResImpl<name, SchedMxList, resources>;
+multiclass LMULReadAdvance<string name, int val, list<SchedWrite> writes = []>
+  : LMULReadAdvanceImpl<name, SchedMxList, val, writes>;
+
+multiclass LMULSchedWritesW<string name> : LMULSchedWritesImpl<name, SchedMxListW>;
+multiclass LMULSchedReadsW<string name> : LMULSchedReadsImpl<name, SchedMxListW>;
+multiclass LMULWriteResW<string name, list<ProcResourceKind> resources>
+  : LMULWriteResImpl<name, SchedMxListW, resources>;
+multiclass LMULReadAdvanceW<string name, int val, list<SchedWrite> writes = []>
+  : LMULReadAdvanceImpl<name, SchedMxListW, val, writes>;
+
+multiclass LMULSchedWritesFW<string name> : LMULSchedWritesImpl<name, SchedMxListFW>;
+multiclass LMULSchedReadsFW<string name> : LMULSchedReadsImpl<name, SchedMxListFW>;
+multiclass LMULWriteResFW<string name, list<ProcResourceKind> resources>
+  : LMULWriteResImpl<name, SchedMxListFW, resources>;
+multiclass LMULReadAdvanceFW<string name, int val, list<SchedWrite> writes = []>
+  : LMULReadAdvanceImpl<name, SchedMxListFW, val, writes>;
+
+multiclass LMULSchedWritesFWRed<string name> : LMULSchedWritesImpl<name, SchedMxListFWRed>;
+multiclass LMULWriteResFWRed<string name, list<ProcResourceKind> resources>
+  : LMULWriteResImpl<name, SchedMxListFWRed, resources>;
 
-// Creates ReadAdvance for each (name, LMUL, val) tuple for LMUL
-// in SchedMxListFW
-multiclass LMULReadAdvanceFW<string name, int val, list<SchedWrite> writes = []> {
-  foreach mx = SchedMxListFW in {
-    def : ReadAdvance<!cast<SchedRead>(name # "_" # mx), val, writes>;
-  }
-}
 
 // 3.6 Vector Byte Length vlenb
 def WriteRdVLENB      : SchedWrite;