[PATCH] D139732: [AMDGPU] Add pass to rewrite partially used virtual superregisters after RenameIndependentSubregs pass with registers of minimal size.

Valery Pykhtin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 28 00:56:22 PST 2023

Previous message: [PATCH] D144945: [Doc][NFC] Add template type when use MachinePassRegistry.
Next message: [PATCH] D141819: [NFC][AArch64] Use 'i' to encode the offset form of load/store.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

vpykhtin added a comment.

Kindly pinging, this is ready to submit.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139732/new/

https://reviews.llvm.org/D139732

Previous message: [PATCH] D144945: [Doc][NFC] Add template type when use MachinePassRegistry.
Next message: [PATCH] D141819: [NFC][AArch64] Use 'i' to encode the offset form of load/store.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list